AMD Athlon Processor x86 Optimization Manual page 197

22007E/0—November 1999
Table 16. Final Output Memory Types (Continued)
Input Memory Type
CD
WC
WT
WP
WB
-
Notes:
1. WP is not functional for RdMem/WrMem.
2. ForceCD must cause the MTRR memory type to be ignored in order to avoid x's.
3. D-I should always be WP because the BIOS will only program RdMem-WrIO for WP. CD
is forced to preserve the write-protect intent.
4. Since cached IO lines cannot be copied back to IO, the processor forces WB to WT to
prevent cached IO from going dirty.
5. ForceCD. The memory type is forced CD due to (1) CR0[CD]=1, (2) memory type is for
the ITLB and the I-Cache is disabled or for the DTLB and the D-Cache is disabled, (3)
when clean victims must be written back and RdIO and WrIO and WT, WB, or WP, or
(4) access to Local APIC space.
6. The processor does not support this memory type.
Page Attribute Table (PAT)
Output Memory Type
AMD-751
-
-
-
-
-
AMD Athlon™ Processor x86 Code Optimization
Note
CD
WC
WT
WP
WT 4
CD 2
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