AMD Athlon Processor x86 Optimization Manual page 207

22007E/0—November 1999
Table 19. Integer Instructions (Continued)
Instruction Mnemonic
BT mem16/32, imm8
BTC mreg16/32, reg16/32
BTC mem16/32, reg16/32
BTC mreg16/32, imm8
BTC mem16/32, imm8
BTR mreg16/32, reg16/32
BTR mem16/32, reg16/32
BTR mreg16/32, imm8
BTR mem16/32, imm8
BTS mreg16/32, reg16/32
BTS mem16/32, reg16/32
BTS mreg16/32, imm8
BTS mem16/32, imm8
CALL full pointer
CALL near imm16/32
CALL mem16:16/32
CALL near mreg32 (indirect)
CALL near mem32 (indirect)
CBW/CWDE
CLC
CLD
CLI
CLTS
CMC
CMOVA/CMOVNBE reg16/32, reg16/32
CMOVA/CMOVNBE reg16/32, mem16/32
CMOVAE/CMOVNB/CMOVNC reg16/32, mem16/32 0Fh
CMOVAE/CMOVNB/CMOVNC mem16/32,
mem16/32
CMOVB/CMOVC/CMOVNAE reg16/32, reg16/32
CMOVB/CMOVC/CMOVNAE mem16/32, reg16/32
CMOVBE/CMOVNA reg16/32, reg16/32
CMOVBE/CMOVNA reg16/32, mem16/32
Instruction Dispatch and Execution Resources
AMD Athlon™ Processor x86 Code Optimization
First Second ModR/M
Byte Byte Byte
0Fh BAh mm-100-xxx DirectPath
0Fh BBh 11-xxx-xxx
0Fh BBh mm-xxx-xxx VectorPath
0Fh BAh 11-111-xxx
0Fh BAh mm-111-xxx VectorPath
0Fh B3h 11-xxx-xxx
0Fh B3h mm-xxx-xxx VectorPath
0Fh BAh 11-110-xxx
0Fh BAh mm-110-xxx VectorPath
0Fh ABh 11-xxx-xxx
0Fh ABh mm-xxx-xxx VectorPath
0Fh BAh 11-101-xxx
0Fh BAh mm-101-xxx VectorPath
9Ah
E8h
FFh 11-011-xxx
FFh 11-010-xxx
FFh mm-010-xxx VectorPath
98h
F8h
FCh
FAh
0Fh 06h
F5h
0Fh 47h 11-xxx-xxx
0Fh 47h mm-xxx-xxx DirectPath
43h 11-xxx-xxx
0Fh 43h mm-xxx-xxx DirectPath
0Fh 42h 11-xxx-xxx
0Fh 42h mm-xxx-xxx DirectPath
0Fh 46h 11-xxx-xxx
0Fh 46h mm-xxx-xxx DirectPath
Decode
Type
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
DirectPath
DirectPath
VectorPath
VectorPath
VectorPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
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