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The TLK3134 supports the IEEE 802.3 defined Management Data Input/Output (MDIO) Interface to allow
ease in configuration and status monitoring of the link. The bi-directional data pin (MDIO) must be
externally pulled up to 1.2 V or 2.5 V (VDDM) per the standard for MDIO.
The TLK3134 supports the IEEE 1149.1/1149.6 defined JTAG test port for ease in board manufacturing
test. It also supports a comprehensive series of built-in tests for self-test purposes including PRBS
generation and verification, CRPAT, CJPAT, Mixed/High/Low Frequency testing.
The TLK3134 operates with a 1.2 V core voltage supply, a 1.5/1.8 V HSTL I/O voltage supply and a 2.5 V
LVCMOS/bias supply.
The TLK3134 is packaged in a 19×19mm, 289-ball, 1mm ball pitch Plastic Ball Grid Array (PBGA)
package and is characterized for operation from –40°C to 85°C Ambient, 105°C Junction, and 5% power
supply variation at the balls of the device unless noted otherwise.
The following block diagram provides a high level description of the TLK3134.
Copyright © 2007–2009, Texas Instruments Incorporated
LANE0
LANE1
LANE2
LANE3
Figure 2-4. Custom Independent Configuration Application
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Product Folder Link(s):
SLLS838F – MAY 2007 – REVISED DECEMBER 2009
TLK3134
XGXS CORE
TLK3134
TLK3134
Detailed Description
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