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6
Circuit Description
LNA
RF_P
RF_N
PA
RC OSC
A simplified block diagram of CC2500 is shown
in Figure 2.
CC2500
features a low-IF receiver. The
received RF signal is amplified by the low-
noise amplifier (LNA) and down-converted in
quadrature (I and Q) to the intermediate
frequency (IF). At IF, the I/Q signals are
digitised by the ADCs. Automatic gain control
(AGC), fine channel filtering, demodulation
bit/packet
synchronization
digitally.
The transmitter part of CC2500 is based on
direct synthesis of the RF frequency.
The
frequency
synthesizer
completely on-chip LC VCO and a 90 degrees
phase shifter for generating the I and Q LO
7
Application Circuit
Only a few external components are required
for using the CC2500 . The recommended
application circuit is shown in Figure 3. The
external components are described in Table
14, and typical values are given in Table 15.
RADIO CONTROL
ADC
ADC
FREQ
0
SYNTH
90
BIAS
XOSC
RBIAS
XOSC_Q1
XOSC_Q2
Figure 2: CC2500 Simplified Block Diagram
are
performed
includes
a
SWRS040C
signals to the down-conversion mixers in
receive mode.
A crystal is to be connected to XOSC_Q1 and
XOSC_Q2. The crystal oscillator generates the
reference frequency for the synthesizer, as
well as clocks for the ADC and the digital part.
A 4-wire SPI serial interface is used for
configuration and data buffer access.
The digital baseband includes support for
channel configuration, packet handling, and
data buffering.
Bias Resistor
The bias resistor R171 is used to set an
accurate bias current.
Balun and RF Matching
The components between the RF_N/RF_P pins
and the point where the two signals are joined
together (C122, C132, L121, and L131) form a
CC2500
SCLK
SO (GDO1)
SI
CSn
GDO0 (ATEST)
GDO2
Page 17 of 89
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