Rtbi Mode (Reduced Ten Bit Interface); Rtbi - Individual Channel Byte Ordering - Channel 0 Example; Rtbi - Lane To Functional Pin Mapping - Texas Instruments TLK3134 Data Manual

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2.7.3 RTBI Mode (Reduced Ten Bit Interface)

DATA CHANNEL TRANSMIT DATA 5 BITS
NUMBER
Channel 0
Channel 1
Channel 2
Channel 3
DDR Source Centered Timing
(Nibble Order = 1 Default)
TXCLK_[0]
TXD_[4:0]
RXCLK_[0]
RXD_[4:0]
DDR Source Aligned Timing
(Nibble Order = 1 Default)
TXCLK_[0]
TXD_[4:0]
RXCLK_[0]
RXD_[4:0]
Figure 2-9. RTBI – Individual Channel Byte Ordering – Channel 0 Example
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Table 2-6. RTBI – Lane To Functional Pin Mapping
RECEIVE DATA 5 BITS
(INPUT)
TXD_[4:0]
TXD_[12:8]
TXD_[20:16]
TXD_[28:24]
Data0[4:0] Data0[9:5]
Data0[4:0] Data0[9:5]
Data0[4:0] Data0[9:5]
Data0[4:0] Data0[9:5]
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SLLS838F – MAY 2007 – REVISED DECEMBER 2009
TRANSMIT CLOCK
(OUTPUT)
RXD_[4:0] TXCLK_[0]
RXD_[12:8] TXCLK_[1]
RXD_[20:16] TXCLK_[2]
RXD_[28:24] TXCLK_[3]
DDR Source Centered Timing
TXCLK_[0]
TXD_[4:0]
RXCLK_[0]
RXD_[4:0]
DDR Source Aligned Timing
TXCLK_[0]
TXD_[4:0]
RXCLK_[0]
RXD_[4:0]
TLK3134
RECEIVE CLOCK
(INPUT) (OUTPUT)
RXCLK_[0]
RXCLK_[1]
RXCLK_[2]
RXCLK_[3]
(Nibble Order = 0)
Data0[9:5] Data0[4:0]
Data0[9:5] Data0[4:0]
(Nibble Order = 0)
Data0[9:5] Data0[4:0]
Data0[9:5] Data0[4:0]
Detailed Description
TLK3134
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