4.15 Hstl (Sdr Timing Mode Only) Input Timing Requirements; Hstl (Sdr Timing Mode Only) Falling Edge Aligned (Rising Edge Sampled) Data Input Timing Requirements; Hstl (Sdr Timing Mode Only) Rising Edge Aligned (Falling Edge Sampled) Data Input Timing Requirements - Texas Instruments TLK3134 Data Manual

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4.15 HSTL (SDR Timing Mode Only) Input Timing Requirements

over operating free-air temperature range (unless otherwise noted)
PARAMETER
t TXDATA setup prior to TXCLK
setup
transition high
t TXDATA hold after TXCLK
hold
transition high
t TXDATA setup prior to TXCLK
setup
transition low
t TXDATA hold after TXCLK
hold
transition low
t TXCLK Duty Cycle
duty
t TXCLK Period
period
T TXCLK Frequency
freq
(1) All typical values are at 25°C and with a nominal supply.
TXCLK
V
IH(ac)
TXDATA VDDQ/2
V
IL(ac)
Figure 4-11. HSTL (SDR Timing Mode Only) Falling Edge Aligned (Rising Edge Sampled) Data Input
TXCLK
TXDATA
Figure 4-12. HSTL (SDR Timing Mode Only) Rising Edge Aligned (Falling Edge Sampled) Data Input
Copyright © 2007–2009, Texas Instruments Incorporated
Falling Edge Aligned (Rising Edge Sampled) Data See
Figure 4-11.
Note: Input timing reference of VDDQ/2, with ±1 ns/V rise time
on all inputs signals.
Falling Edge Aligned (Rising Edge Sampled) Data See
Figure 4-11.
Note: Input timing reference of VDDQ/2, with ±1 ns/V rise time
on all inputs signals.
Rising Edge Aligned (Falling Edge Sampled) Data See
Figure 4-12.
Note: Input timing reference of VDDQ/2, with ±1 ns/V rise time
on all inputs signals.
Rising Edge Aligned (Falling Edge Sampled) Data See
Figure 4-12.
Note: Input timing reference of VDDQ/2, with ±1 ns/V rise time
on all inputs signals.
Rising and Falling Edge Sampled Data
Note: Input timing reference of VDDQ/2, with ±1 ns/V rise time
on all inputs signals.
Rising and Falling Edge Aligned Data
Rising and Falling Edge Aligned Data
t
PERIOD
Timing Requirements
t
PERIOD
V
IH(ac)
VDDQ/2
V
IL(ac)
Timing Requirements
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SLLS838F – MAY 2007 – REVISED DECEMBER 2009
TEST CONDITIONS
t t
SETUP HOLD
t
t
SETUP
HOLD
TLK3134
TLK3134
(1)
MIN NOM MAX UNIT
480 ps
480 ps
480 ps
480 ps
40% 60%
2.67 16.67 ns
60 375 MHz
V
IH(ac)
VDDQ/2
V
IL(ac)
V
IH(ac)
VDDQ/2
V
IL(ac)
Electrical Specifications 123