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TLK3134
SLLS838F – MAY 2007 – REVISED DECEMBER 2009
2.6
Device Operation Modes
DEVICE MODE
ST Primary Chip Input
MDIO Access Method
XAUI_ORDER 32809.15
Logical Or w/CODE pin
XAUI_TX_EDGE_ALIGN 32808.15
XAUI_RX_EDGE_ALIGN 32808.11
DDR_SDR 17.5
NIBBLE_ORDER 17.4
TX_EDGE_MODE 17.1
RX_EDGE_MODE 17.0
FC_ENC_MODE 17.6
COMMA_DET_EN 17.7
PCS_EN 17.3 Logical OR w/CODE pin
ENC_DEC_EN 17.2
BUSWIDTH 36864.7
FULL_DDR 17.9
Legend : (X = Don't Care) — (0 = Must Be Zero) — (1 = Must Be One) — (0/1 = Can Be Either Zero-or-One)
(1) Default Mode if ST Primary Chip Input Pin "0", CODE Primary Chip Input Pin "1".
(2) Default Mode if ST Primary Chip Input Pin "0", CODE Primary Chip Input Pin "0".
(3) All Clause 22 Registers are Per Device Channel.
20
Detailed Description
Table 2-2. Device Operation Modes
(1)
(2)
XAUI
10GFC
RGMII
(DDR)
(DDR)
(DDR)
(SDR)
0
Clause 45
1
0
0/1
1
0/1
X
1
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Product Folder Link(s):
RTBI
TBI
GMII
REBI
(DDR
(SDR
(DDR)
)
)
1
Clause 22
X
0
1
0
1
X
0/1
X
0/1
0/1
0
0/1
0
0
0
1
0
Copyright © 2007–2009, Texas Instruments Incorporated
TLK3134
www.ti.com
NBI
EBI
RNBI
TBID
(SDR
(SDR)
(DDR)
(DDR)
)
(3)
0
1
0
X
X
0/1
X
0/1
0
1
0/1
0
1
0
0
NBID
(DDR)
0/1
1
1
1
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