Polarity Configuration Register (Polcf) - Motorola DragonBall MC68328 User Manual

Integrated processor
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LCD Controller
GS
Gray Scale
Gray scale mode bit. This bit, if set, enables 4-gray level (2 bits per pixel) mode. Its default
value is 0, which selects binary pixel (no gray scale) operation.
1 = Gray scale enable
2 = No gray scale

4.7.4.2 POLARITY CONFIGURATION REGISTER (POLCF).

LCKPOL
LCD Shift Clock Polarity
This bit controls the polarity of the LCD shift-clock active edge.
0 = Active negative edge of LCLK
1 = Active positive edge of LCLK
FLMPOL
First-line marker polarity
0 = Active High
1 = Active Low
LPPOL
Line-pulse polarity
0 = Active-high
1 = Active-low
PIXPOL
Pixel polarity
0 = Active-high
1 = Active-low
4-16
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
7
6
5
UNUSED
Address: $(FF)FFFA21
Figure 4-17. Polarity Configuration Register
4
3
2
1
LCKPOL FLMPOL LPPOL PIXPOL
Reset Value: $00
0
MOTOROLA

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