Cpu Interface Filtering - D-Link DGS-3427 - xStack Switch - Stackable Product Manual

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x Stack DGS-3400 Series Layer 2 Gigabit Ethernet M anaged Sw itch

CPU Interface Filtering

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Due to a chipset limitation and needed extra switch security, the xStack DGS-3400 Series switch incorporates CPU Interface
filtering. This added feature increases the running security of the Switch by enabling the user to create a list of access rules for
packets destined for the Switch's CPU interface. Employed similarly to the Access Profile feature previously mentioned, CPU
interface filtering examines Ethernet, IP and Packet Content Mask packet headers destined for the CPU and will either forward
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them or filter them, based on the user's implementation. As an added feature for the CPU Filtering, the xStack DGS-3400 Series
switch allows the CPU filtering mechanism to be enabled or disabled globally, permitting the user to create various lists of rules
without immediately enabling them.
Creating an access profile for the CPU is divided into two basic parts. The first is to specify which part or parts of a frame the
Switch will examine, such as the MAC source address or the IP destination address. The second part is entering the criteria the
Switch will use to determine what to do with the frame. The entire process is described below.
CPU Interface Filtering State
In the following window, the user may globally enable or disable the CPU Interface Filtering mechanism by using the pull-down
menu to change the running state. Choose Enabled to enable CPU packets to be scrutinized by the Switch and Disabled to
disallow this scrutiny.
To view this window, click ACL > CPU Interface Filtering > CPU Interface Filtering State, as shown below.
Figure 5 - 26 CPU Interface Filtering State Settings window
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