Analog Devices Advantiv ADV7619 Hardware User's Manual page 70

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HBR Interface and Output Controls
The ADV7619 can receive HBR audio stream packets. The ADV7619 outputs HBR data over four of the audio output pins in any of the
following formats:
•
An SDPIF stream conforming to the IEC60958 specification (refer to Figure 22). The following configuration is required to output
an SPDIF stream on the HBR output pins:
•
OVR_MUX_HBR is set to 0 or
•
OVR_MUX_HBR is set to 1 and MUX_HBR_OUT is set to 1.
•
A binary stream, if one of the following configurations is used:
•
OVR_MUX_HBR is set to 1, MUX_HBR_OUT is set to 0, and I2SOUTMODE[1:0] is set to 0x0 for an I
(refer to Figure 19).
•
OVR_MUX_HBR is set to 1, MUX_HBR_OUT is set to 0, and I2SOUTMODE[1:0] is set to 0x1 for a right justified stream
(refer to Figure 20).
•
OVR_MUX_HBR is set to 1, MUX_HBR_OUT is set to 0, and I2SOUTMODE[1:0] is set to 0x2 for a left justified stream
(refer to Figure 21).
•
Note that no audio flags are output by the part in these configurations.
•
An AES3 stream on each HBR interface output pin (refer to Figure 23 and Figure 24). The following configuration is required to
output AES3 streams:
•
OVR_MUX_HBR is set to 1.
•
I2SOUTMODE[1:0] is set to 0b11.
Important:
•
Each of the four HBR outputs carry one of four consecutive blocks of the HBR stream
•
The four streams on the four HBR pin are output at one quarter of the audio sample rate, fs
Table 17. HBR Interface Description
HBR Interface IO
AP1
AP2
AP3
AP4
SCLK
LRCLK
MCLKOUT
Note:
•
The audio output mapping controls: I2S_SPDIF_MAP_ROT[1:0] and I2S_SPDIF_MAP_INV also apply to the HBR output signals.
•
The audio output interface pin AP0 will also carry the SPDIF0 output, regardless of I2S_SPDIF_MAP_ROT[1:0] and
I2S_SPDIF_MAP_INV.
OVR_MUX_HBR , Addr 68 (HDMI), Address 0x01[2]
A control to select automatic or manual configuration for HBR outputs. Automatically, HBR outputs are encoded as SPDIF streams. In
manual mode, MUX_HBR_OUT selects the audio output interface.
Function
OVR_MUX_HBR
0 (default)
1
Function
1 st block of HBR stream.
nd
2 block of HBR stream
3 rd block of HBR stream
th
4 block of HBR stream
Bit clock
Data output clock for left and right channel
Audio master clock output
Description
Automatic HBR output control
Manual HBR output control
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Hardware User Guide
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S mode binary stream