Tmds Clock Activity Detection - Analog Devices Advantiv ADV7619 Hardware User's Manual

UG-237

BG_LINE_WIDTH[12:0]

BG_TOTAL_FIELD_HEIGHT[12:0]

BG_FIELD_HEIGHT[12:0]

BG_HDMI_INTERLACED
BG_MEAS_PORT_SEL[2:0], Addr 68 (HDMI), Address 0x00[5:3]
BG_MEAS_PORT_SEL[2:0] selects a background port on which HDMI measurements are to be made and provided in the background
measurement registers. The port in question must be set as a background port in order for this setting to be effective. There is no
conflict if this matches the port selected by HDMI_PORT_SELECT[2:0].
Function
BG_MEAS_PORT_SEL[2:0]
000 (default)
001
BG_MEAS_REQ, Addr 68 (HDMI), Address 0x5A[5] (Self-Clearing)
This bit must be set to get correct measurements of the selected background port. Setting this control sends a request to update the
synchronization parameter measurements of the currently selected background port. The port on which the measurement will be made
is selected by BG_MEAS_PORT_SEL[2:0].
Function
BG_MEAS_REQ Description
0 (default) No request to update selected background port synchronization parameter measurements
1 Requests an update of the selected background port synchronization parameter measurements
Note: After setting the self clearing BG_MEAS_REQ bit, the measurements of the TMDS frequency and video parameters of the
background ports are valid when BG_MEAS_DONE_RAW goes high.
BG_MEAS_DONE_RAW, IO, Address 0x8D[1] (Read Only)
Status of Background port Measurement completed interrupt signal. When set to 1 it indicates measurements of TMDS frequency and
video parameters on the selected background port have been completed. Once set, this bit will remain high until it is cleared via
BG_MEAS_DONE_CLR.
Function
BG_MEAS_DONE_RAW
0 (default)
1
Note: This bit only informs the user that the measurement is complete and can be read back. One should ensure that
BG_PARAM_LOCK is asserted so that the background parameter filters are locked and the measurement values are valid.

TMDS CLOCK ACTIVITY DETECTION

The ADV7619 provides circuitry to monitor TMDS clock activity on each of its HDMI ports. The firmware can poll the appropriate
registers for TMDS clock activity detection and configure the ADV7619 as desired. TMDS clock detection control is active as soon as the
ADV7619 detects activity above a 25 MHz on the TMDS clock input.
TMDS_CLK_A_RAW, IO, Address 0x6A[4] (Read Only)
Raw status of Port A TMDS clock detection signal.
Function
TMDS_CLK_A_RAW
0 (default)
1
Description
Port A
Port B
Description
Measurements of TMDS frequency and video parameters of background port not finished or not
requested.
Measurements of TMDS frequency and video parameters of background port are ready
Description
No TMDS clock detected on Port A
TMDS clock detected on Port A
Rev. A | Page 40 of 204
Hardware User Guide