Cp Status; Cp Core Bypassing; Changes To Cp Core Bypassing Section - Analog Devices Advantiv ADV7619 Hardware User's Manual

UG-237
DEF_COL_CHB[7:0] , Addr 44 (CP), Address 0xC1[7:0]
A control to set the default color for Channel B. To be used if CP_DEF_COL_MAN_VAL is 1.
Function
DEF_COL_CHB[7:0]
0x00 (default)
DEF_COL_CHC[7:0] , Addr 44 (CP), Address 0xC2[7:0]
A control to set the default color for Channel C. To be used if CP_DEF_COL_MAN_VAL is 1.
Function
DEF_COL_CHC[7:0]
0x00 (default)

CP STATUS

CP_REG_FF
CP_REG_FF is a status register that contains status bits for the CP core. Register CP_REG_FF holds field: CP_FREE_RUN.
CP_REG_FF Bit Number
0
1
2
3
4
5
6
7
CP_FREE_RUN , Addr 44 (CP), Address 0xFF[4] (Read Only)
Component processor free run status.
Function
CP_FREE_RUN
0 (default)
1

CP CORE BYPASSING

It is possible to bypass CP core completely with using following register. When OP_FORMAT_SEL is set to 0x94, 0x95, 0x96, 0x54
CP_COMPLETE_BYPASS_IN_HDMI_MODE must be set to 0.
CP_COMPLETE_BYPASS_IN_HDMI_MODE , IO, Address 0xBF[0]
Function
CP_COMPLETE_BYPASS_IN_HDMI_MODE
0 
1
Description
Default value
Description
Default value
Bit Name
Reserved
Reserved
Reserved
Reserved
CP_FREE_RUN
Reserved
Reserved
Reserved
Description
The CP is not free running.
The CP is free running.
Description
Normat mode
HDMI data directly fed to output bypassing CP completely, CP_CLK can be powered down
Rev. A | Page 152 of 204
Description
CP is free running (no valid video signal found)
Hardware User Guide