Hardware User Guide
TMDS_CLK_B_RAW, IO, Address 0x6A[3] (Read Only)
Raw status of Port B TMDS clock detection signal.
Function
TMDS_CLK_A_RAW
0 (default)
1
Important
•
The clock detection flag is valid if the part is powered up or in Power Down Mode 1. Refer to Power-Down Mode 1 section.
•
The clock detection flags is valid, irrespective of the mode the part is set into via the PRIM_MODE[3:0] register.
Clock and Data Termination Control
The ADV7619 provides controls for the TMDS clock and data termination on all HDMI ports. The ADV7619 also offers automatic
manual termination closure of the selected port, and individual manual control over the HDMI ports.
Note: The clock termination of the port by HDMI_PORT_SELECT[2:0] must always be enabled.
Part does not support HDMI streams with clock lower than 25 MHz.
TERM_AUTO, Addr 68 (HDMI), Address 0x01[0]
This bit allows the user to select automatic or manual control of clock termination. If automatic mode termination is enabled, then the
termination on the port selected via HDMI_PORT_SELECT[1:0] is enabled. The termination is disabled on all other ports
Function
TERM_AUTO
0 (default)
1
Note: To enable the fast switching feature the termination should be set manually for each port. When manual mode is enabled, the
termination for each port is set individually by the CLOCK_TERMX_DISABLE control bits (were X = A and B)
CLOCK_TERMA_DISABLE, Addr 68 (HDMI), Address 0x83[0]
Disable clock termination on Port A. Can be used when TERM_AUTO set to 0
Function
CLOCK_TERMA_DISABLE
0
1 (default)
CLOCK_TERMB_DISABLE, Addr 68 (HDMI), Address 0x83[1]
Disable clock termination on Port B. Can be used when TERM_AUTO set to 0
Function
CLOCK_TERMB_DISABLE
0
1 (default)
HDMI/DVI STATUS BITS
HDMI/DVI status mode is available through HDMI_MODE for active port and BG_HDMI_MODE for background port.
HDMI_MODE, Addr 68 (HDMI), Address 0x05[7] (Read Only)
A readback to indicate whether the stream processed by the HDMI core is a DVI or an HDMI stream.
Function
HDMI_MODE
0 (default)
1
Description
No TMDS clock detected on Port B
TMDS clock detected on Port B
Description
Disable termination automatic control
Enable termination automatic control
Description
Enable Termination Port A
Disable Termination Port A
Description
Enable Termination Port B
Disable Termination Port B
Description
DVI mode detected
HDMI mode detected
Rev. A | Page 41 of 204
UG-237
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