Analog Devices Advantiv ADV7619 Hardware User's Manual page 130

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In ADV7619, there are three operational modes for the STDI block:
•
Continuous mode:
The STDI block performs continuous measurements on lock/unlock bases and updates the corresponding I
lock status bit (STDI_DVALID).
•
Real-time continuous mode:
The STDI block performs continuous measurement regardless of the lock/unlock bases and always updates real-time measurement
data to the corresponding I
•
Single shot mode:
The STDI block waits for a trigger (0 to 1 transition on CH1_TRIG_STDI) to start the measurements. Single shot mode can be useful
in complex systems where the scheduling of functions is important.
A data valid flag, CH1_STDI_DVALID, is provided, which is based on the status of the horizontal/vertical lock of the block and is held
low during the measurements. The four parameters should only be read after the CH1_STDI_DVALID flag has gone high for the
continuous/single shot mode. In real-time continuous mode, the ADV7619 allows the user to monitor the real-time timing measurement
regardless of the CH1_STDI_DVALID flag. Refer to the STDI Readback Values section for information on the readback values.
Notes
•
Synchronization type pulses include horizontal synchronization, equalization and serration pulses.
•
The CH1_TRIG_STDI flag is not self-clearing. The measurements are only started upon setting the CH1_TRIG_STDI flag. This
means that after setting it, it must be cleared again by writing a 0 to it. This second write (to clear the flag) can be done at any time
and does not have any effect on running measurements. It also does not invalidate previous measurement results.
•
The ADV7619 only measures those parameters, but does not take any action based upon them. The part does not reconfigure itself.
To avoid unforeseen problems in the scheduling of a system controller, the part merely helps to identify the input.
•
Since real-time continuous mode provides the capability to monitor the real-time measurement data regardless of the block lock
status, the user should be aware that the timing readback values may not be a valid readback measurement in this mode.
CH1_STDI_CONT , Addr 44 (CP), Address 0x86[1]
A control to set the synchronization source polarity detection mode for Sync Channel 1 STDI.
Function
CH1_STDI_CONT
0
1 (default)
BYPASS_STDI1_LOCKING , Addr 44 (CP), Address 0xF5[1]
Bypass STDI locking for Sync Channel 1.
Function
BYPASS_STDI1_LOCKING
0 (default)
1
CH1_TRIG_STDI , Addr 44 (CP), Address 0x86[2]
Trigger synchronization source and polarity detector for Sync Channel 1 STDI. A 0-to-1 transition in this bit restarts the auto-sync
detection algorithm. This is not a self-clearing bit and must be set to 0 to prepare for next trigger.
Function
CH1_TRIG_STDI
0 (default)
1
2
C registers.
Description
Sync Channel 1 STDI works in one-shot mode (triggered by a 0 to 1 transition on the CH1_TRIG_STDI bit)
Sync Channel 1 STDI works in continuous mode
Description
Update CH1_BL, CH1_LCF and CH1_LCVS only the sync Channel 1 STDI locks and CH1_STDI_DVALID is set to 1
Update CH1_BL, CH1_LCF,CH1_LCVS from the sync Channel 1 STDI as they are measured
Description
Default value—transition 0 to 1 restarts auto-sync detection algorithm
Transition 0 to 1 restarts auto-sync detection algorithm
Rev. A | Page 130 of 204
Hardware User Guide
2
C registers based on the