Analog Devices Advantiv ADV7619 Hardware User's Manual page 18

UG-237
TRI_PIX
This bit allows the user to tristate the output driver of pixel outputs. Upon setting TRI_PIX, the pixel output P[35:0] is tristated.
TRI_PIX, IO, Address 0x15[1]
A control to tristate the pixel data on the pixel pins, P[47:0].
Function
TRI_PIX
0
1 (default)
Tristate LLC Driver
TRI_LLC, IO, Address 0x15[2]
A control to tristate the output pixel clock on the LLC pin.
Function
TRI_LLC
0
1 (default)
Tristate Synchronization Output Drivers
The following output synchronization signals are tristated when TRI_SYNCS is set:
•
VS/FIELD/ALSB
•
HS
•
DE
The drive strength controls for these signals are provided via the DR_STR_SYNC bits. The ADV7619 does not support tristating via a
dedicated pin.
TRI_SYNCS, IO, Address 0x15[3]
Synchronization output pins tristate control. The synchronization pins under this control are HS, VS/FIELD/ALSB, and DE.
Function
TRI_SYNCS
0
1 (default)
Tristate Audio Output Drivers
TRI_AUDIO, IO Map, Address 0x15, [4]
TRI_AUDIO allows the user to tristate the drivers of the following audio output signals:
•
AP0
•
AP1/I2S_TDM
•
AP2
•
AP3
•
AP4
•
AP5
•
SCLK/INT2
•
MCLK/INT2
The drive strength for the output pins can be controlled by the DR_STR[1:0] bits. The ADV7619 does not support tristating via a
dedicated pin.
Description
Pixel bus active
Tristates pixel bus
Description
LLC pin active
Tristates LLC pin
Description
Sync output pins active
Tristates sync output pins
Rev. A | Page 18 of 204
Hardware User Guide