Global Control Registers; Adv7619 Revision Identification; Power-Down Controls - Analog Devices Advantiv ADV7619 Hardware User's Manual

Hardware User Guide

GLOBAL CONTROL REGISTERS

The register control bits described in this section deal with the general control of the chip, and the CP and the HDMI receiver sections of
the ADV7619.

ADV7619 REVISION IDENTIFICATION

RD_INFO[15:0], IO, Address 0xEA[7:0]; Address 0xEB[7:0] (Read Only)
Chip revision code.
Function
RD_INFO[15:0]
0x20C0

POWER-DOWN CONTROLS

Primary Power-Down Controls
POWER_DOWN is the main power-down control. It is the main control for power-down Mode 0 and Mode 1. See the Power-Down
Modes section for more details.
POWER_DOWN, IO, Address 0x0C[5]
A control to enable power-down mode. This is the main I
Function
POWER_DOWN
0
1 (default)
Secondary Power-Down Controls
The following controls allow various sections of the ADV7619 to be powered down.
It is possible to stop the clock to the CP to reduce power for a power-sensitive application. The CP_PWRDN bit enables this power-save
mode. The HDMI block is not affected by this power-save mode. This allows the use of limited HDMI, STDI monitoring features while
reducing the power consumption. For full processing of the HDMI input, the CP core needs to be powered up.
CP_PWRDN, IO, Address 0x0C[2]
A power-down control for the CP core.
Function
CP_PWRDN
0 (default)
1
XTAL_PDN
XTAL_PDN allows the user to power down the XTAL clock in the following sections:
•
STDI blocks
•
Free run synchronization generation block
•
2
I C sequencer block, which is used for the configuration of the gain, clamp, and offset
•
CP and HDMI section
The XTAL clock is also provided to the HDCP engine, EDID, and the repeater controller within the HDMI receiver. The XTAL clock
within these sections is not affected by XTAL_PDN.
XTAL_PDN, IO, Address 0x0B[0]
A power-down control for the XTAL in the digital blocks.
Function
XTAL_PDN
0 (default)
1
Description
ADV7619
2
C power-down control.
Description
Chip operational
Enables chip power down
Description
Powers up clock to CP core.
Powers down clock to CP core. HDMI block not affected by this bit.
Description
Powers up XTAL buffer to digital core
Powers down XTAL buffer to digital core
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