Revision History - Analog Devices Advantiv ADV7619 Hardware User's Manual

Hardware User Guide
CP Data Path for HDMI Modes ............................................. 125
Sync Processed by CP Section ................................................ 129
CP Output Synchronization Signal Positioning ................... 136
CP HDMI Controls .................................................................. 148
Free Run Mode ......................................................................... 148
CP Status ................................................................................... 152
CP Core Bypassing ....................................................................... 152
Consumer Electronics Control ................................................... 153
Main Controls ........................................................................... 153
CEC Transmit Section ............................................................. 154
CEC Receive Section ................................................................ 156
Antiglitch Filter Module .......................................................... 161
Typical Operation Flow ........................................................... 162
Low Power CEC Message Monitoring .................................. 165
Interrupts ....................................................................................... 167
Interrupt Architecture Overview ........................................... 167

REVISION HISTORY

12/11-Rev. 0 to Rev. A
Changes to the Fourth Paragraph of the Introduction to the
ADV7619 Section .............................................................................. 7
Changes to Video Output Formats Section ................................... 8
Changes to Pin 113 Description .................................................... 13
Changes to Table 7 .......................................................................... 25
Added Endnote 1 and Endnote 2 to OP_FORMAT_SEL[7:0], IO,
Address 0x03[7:0] Section .............................................................. 27
Changes to DLL on LLC Clock Path Section .............................. 29
Changes to CS_DATA[27:24], Sampling Fequency, HDMI Map,
Address 0x39[3:0] Section .............................................................. 80
Changes to Check the Value of Each Coefficient Section........114
Changes to CP_HUE[7:0], Addr 44 (CP), Address 0x3D[7:0]
Section ............................................................................................116
Changes to CP Core Bypassing Section .....................................152
Changes to INT2_POL, IO, Address 0x41[2] Section ..............171
Added Endnote 1 to Table 76 ......................................................198
Added Endnote 1 to Table 81 ......................................................203
8/11-Revision 0: Initial Version
Interrupt Pins ............................................................................ 170
Description of Interrupt Bits ................................................... 173
Additional Explanations .......................................................... 174
Register Access and Serial Ports Description ............................ 189
2
Main I C Port ............................................................................. 189
DDC Ports .................................................................................. 191
Appendix A .................................................................................... 193
PCB Layout Recommendations .............................................. 193
Power Supply Bypassing ........................................................... 193
Digital Outputs (Data and Clocks) ......................................... 193
Digital Inputs ............................................................................. 194
XTAL and Load Cap Value Selection ..................................... 194
Appendix B .................................................................................... 195
Recommended Unused Pin Configurations ......................... 195
Appendix C .................................................................................... 198
Pixel Output Formats ............................................................... 198
Rev. A | Page 3 of 204
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