Hardware User Guide
Additional Features
•
HS, VS, FIELD, and DE output signals with programmable position, polarity, and width
•
Numerous interrupt sources available for the INT1 and INT2 interrupt request output pins, available via one of the selected pins, that
is, SCLK/INT2, MCLK/INT2, or HPA_A/INT2
•
Temperature range of 0°C to +70°C
•
14 mm × 14 mm, 128-pin TQFP_EP package
FUNCTIONAL BLOCK DIAGRAM
XTALP
DPLL
XTALN
SCL
SDA
CS
CEC
CEC
CONTROLLER
RXA_5V
5V DETECT
RXB_5V
AND HPD
HPA_A/INT2
CONTROLLER
HPA_B
DDCA_SDA
EDID
DDCA_SCL
REPEATER
DDCB_SDA
CONTROLLER
DDCB_SCL
PLL
RXA_C±
RXA_0±
EQUALIZER
RXA_1±
RXA_2±
RXB_C±
PLL
RXB_0±
RXB_1±
EQUALIZER
RXB_2±
CONTROL
INTERFACE
I
C
2
CONTROL
AND DATA
HDCP
EEPROM
HDCP
ENGINE
SAMPLER
SAMPLER
Figure 2. Functional Block Diagram
Rev. A | Page 9 of 204
3Gbs VIDEO PATH
BACKEND
COLOR SPACE
CONVERSION
HDMI
PROCESSOR
COMPONENT
PROCESSOR
A
DATA
B
PREPROCESSOR
C
AND COLOR
SPACE
CONVERSION
PACKET/
INFOFRAME
MEMORY
PACKET
PROCESSOR
12
P0 TO P11
12
P12 TO P23
12
P24 TO P35
12
P36 TO P47
LLC
HS/CS
VS/FIELD/ALSB
DE
INTERRUPT
INT1
CONTROLLER
(INT1, INT2)
AP1/I2S_TDM
AP2
AP3
AP4
AP5
SCLK/INT2
MUTE
MCLK/INT2
AUDIO
PROCESSOR
AP0
ADV7619
UG-237
Need help?
Do you have a question about the Advantiv ADV7619 and is the answer not in the manual?
Questions and answers