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7.6.2.2 Interrupt Status Register 2
7.6.2.3 Interrupt Status Register 3
Advance Information
78
Address:
$FE05
Bit 7
6
Read:
0
0
Write:
R
R
Reset:
0
0
R
= Reserved
Figure 7-13. Interrupt Status Register 2 (INT2)
I
11–I
7 — Interrupt Flags 11–7
F
F
These flags indicate the presence of interrupt requests from the
sources shown in
Table
1 = Interrupt request present
0 = No interrupt request present
Address:
$FE06
Bit 7
6
Read:
0
0
Write:
R
R
Reset:
0
0
R
= Reserved
Figure 7-14. Interrupt Status Register 2 (INT2)
Bits 7–0 — Always read 0
5
4
3
0
IF11
IF10
R
R
R
0
0
0
7-3.
5
4
3
0
0
0
R
R
R
0
0
0
MC68HC(7)08KH12
2
1
Bit 0
IF9
IF8
IF7
R
R
R
0
0
0
2
1
Bit 0
0
0
0
R
R
R
0
0
0
Rev. 1.1
—
Freescale Semiconductor
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