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218
IRQF1 — IRQ1 Flag
This read-only status bit is high when the IRQ1 interrupt is pending.
1 = IRQ1 interrupt pending
0 = IRQ1 interrupt not pending
ACK1 — IRQ1 Interrupt Request Acknowledge Bit
Writing a logic one to this write-only bit clears the IRQ1 latch. ACK1
always reads as logic zero. Reset clears ACK1.
IMASK1 — IRQ1 Interrupt Mask Bit
Writing a logic one to this read/write bit disables IRQ1 interrupt
requests. Reset clears IMASK1.
1 = IRQ1 interrupt requests disabled
0 = IRQ1 interrupt requests enabled
MODE1 — IRQ1 Edge/Level Select Bit
This read/write bit controls the triggering sensitivity of the IRQ1/V
pin. Reset clears MODE1.
1 = IRQ1/V
interrupt requests on falling edges and low levels
PP
0 = IRQ1/V
interrupt requests on falling edges only
PP
MC68HC(7)08KH12
Rev. 1.1
—
Freescale Semiconductor
PP
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