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Addr.
Register Name
Break Status Register
$FE00
Reset Status Register
$FE01
Break Flag Control Register
$FE03
Interrupt Status Register 1
$FE04
Interrupt Status Register 2
$FE05
Interrupt Status Register 3
$FE06
Advance Information
64
Bit 7
Read:
R
Write:
(BSR)
Reset:
Read:
POR
Write:
(RSR)
Reset:
1
Read:
BCFE
Write:
(BFCR)
Reset:
0
Read:
IF6
Write:
R
(INT1)
Reset:
0
Read:
0
Write:
R
(INT2)
Reset:
0
Read:
0
Write:
R
(INT3)
Reset:
0
Figure 7-2. SIM I/O Register Summary
6
5
4
R
R
R
PIN
COP
ILOP
0
0
0
R
R
R
IF5
IF4
IF3
R
R
R
0
0
0
0
0
IF11
R
R
R
0
0
0
0
0
0
R
R
R
0
0
0
= Unimplemented
3
2
1
R
R
SBSW
0
ILAD
USB
0
0
0
0
R
R
R
IF2
IF1
0
R
R
R
0
0
0
IF10
IF9
IF8
R
R
R
0
0
0
0
0
0
R
R
R
0
0
0
R
= Reserved for factory test
MC68HC(7)08KH12
Rev. 1.1
—
Freescale Semiconductor
Bit 0
R
0
0
R
0
R
0
IF7
R
0
0
R
0
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