11.2 Introduction
11.3 Features
Advance Information
162
This section describes the timer interface module (TIM2, Version B). The
TIM is a two-channel timer that provides a timing reference with input
capture, output compare, and pulse-width-modulation functions.
11-1
is a block diagram of the TIM.
Features of the TIM include the following:
•
Two Input Capture/Output Compare Channels
– Rising-Edge, Falling-Edge, or Any-Edge Input Capture Trigger
– Set, Clear, or Toggle Output Compare Action
•
Buffered and Unbuffered Pulse Width Modulation (PWM) Signal
Generation
•
Programmable TIM Clock Input
– Seven-Frequency Internal Bus Clock Prescaler Selection
– External TIM Clock Input (4-MHz Maximum Frequency)
•
Free-Running or Modulo Up-Count Operation
•
Toggle Any Channel Pin on Overflow
•
TIM Counter Stop and Reset Bits
•
Modular Architecture Expandable to Eight Channels
Figure
MC68HC(7)08KH12
Rev. 1.1
—
Freescale Semiconductor