Usb Sie Timing Interrupt Register (Sietir) - Freescale Semiconductor MC68HC08KH12 Datasheet

9.4.3 USB SIE Timing Interrupt Register (SIETIR)

MC68HC(7)08KH12 Rev. 1.1
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Freescale Semiconductor
SUSP1-SUSP4 — Downstream Port Selective Suspend Bit
This read/write bit forces the downstream port entering the selective
suspend mode. This bit can be set by the host request SetPortFeature
(PORT_SUSPEND) only. When this bit is set, the hub prevents
propagating any bus activity (except the port reset or port resume
request or the global reset signal) downstream, and the port can only
reflect upstream bus state changes via the endpoint 1 of the hub. The
blocking occurs at the next EOF2 point when this bit is set. Reset
clears this bit.
1 = Force downstream port enters the selective suspend mode
0 = Default
D1+/D1– to D4+/D4– — Downstream Port Differential Data
These read only bits are the differential data shown on the HUB
downstream ports. When the bit SUSPND in the register HRPCR is 0,
the data is the latched state at the last EOF2 sample point. When the
bit SUSPND is 1, the data reflects the current state on the data line
while accessing this register.
Address: $0056
Bit 7 6
Read: SOFF EOF2F
Write:
Reset: 0 0
= Unimplemented
Figure 9-4. USB SIE Timing Interrupt Register (SIETIR)
5 4 3
EOPF TRANF
SOFIE
0 0 0
2 1 Bit 0
EOF2IE EOPIE TRANIE
0 0 0
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