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8.5 I/O Signals
8.5.1 Crystal Amplifier Input Pin (OSC1)
8.5.2 Crystal Amplifier Output Pin (OSC2)
8.5.3 External Filter Capacitor Pin (CGMXFC)
NOTE:
8.5.4 PLL Analog Power Pin (V
NOTE:
8.5.5 PLL Analog Ground Pin (V
NOTE:
Advance Information
98
The following paragraphs describe the CGM I/O signals.
The OSC1 pin is an input to the crystal oscillator amplifier.
The OSC2 pin is the output of the crystal oscillator inverting amplifier.
The CGMXFC pin is required by the loop filter to filter out phase
corrections. A small external capacitor is connected to this pin.
To prevent noise problems, C
CGMXFC pin as possible, with minimum routing distances and no
routing of other signals across the C
)
DDA
V
is a power pin used by the analog portions of the PLL. Connect the
DDA
V
pin to the same voltage potential as the V
DDA
Route V
carefully for maximum noise immunity and place bypass
DDA
capacitors as close as possible to the package.
)
SSA
V
is a ground pin used by the analog portions of the PLL. Connect
SSA
the V
pin to the same voltage potential as the V
SSA
Route V
carefully for maximum noise immunity and place bypass
SSA
capacitors as close as possible to the package.
should be placed as close to the
F
connection.
F
pin.
DD
SS
MC68HC(7)08KH12
Freescale Semiconductor
pin.
Rev. 1.1
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