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PTD7/KBD7–
PTD0/KBD0
PTE4
PTE3/KBE3–
PTE0/KBE0
PTF7/KBF7–
PTF0/KBF0
DPLUS4
DS Port 4
DMINUS4
DPLUS3
DS Port 3
DMINUS3
DPLUS2
DS Port 2
DMINUS2
DPLUS1
DS Port 1
DMINUS1
DPLUS0
US Port
DMINUS0
PORTS ARE SOFTWARE CONFIGURABLE WITH PULLUP DEVICE IF INPUT PORT
SOFTWARE CONFIGURABLE LED DIRECT DRIVE 3mA SOURCE /10mA SINK or STANDARD DRIVE
PIN CONTAINS INTEGRATED PULLUP DEVICE
PIN HAS INTERRUPT CAPABILITY
PIN HAS INTERRUPT AND INTEGRATED PULLUP DEVICE.
PIN HAS OPTICAL COUPLING INTERFACE
PTC4–PTC0
PTB7–PTB0
PORT C
PORT B
DDRC
DDRB
CPU CONTROL
68HC08 CPU
CPU REGISTERS
STACK POINTER
PROGRAM COUNTER
V 1 1 H I
CONDITION CODE REGISTER
Embedded USB Function
384 bytes RAM
Figure 1-1. MCU Block Diagram
PTA7–PTA0
PORT A
DDRA
ALU
ACCUMULATOR
INDEX REGISTER
N Z C
12k-bytes ROM/OTPROM
VDD1
VSS1
POWER SUPPLY
AND
VDD2
VOLTAGE REGULATION
VSS2
REGOUT
OSC2
OSC1
CLOCK GENERATION
VDDA
MODULE AND PLL
VSSA
CGMXFC
SYSTEM INTEGRATION
RST
MODULE
IRQ1/VPP
IRQ MODULE
BREAK MODULE
POWER-ON RESET
MODULE
TCLK/PTE0
TIMER INTERFACE
TCH0/PTE1
MODULE
TCH1/PTE2
COP MODULE
MONITOR ROM
240 bytes
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