Infineon Technologies CYPRESS Traveo Series Manual page 301

Page Section
10 3. Product Description
3.2. Product
Description
Document Number: 002-10634 Rev. *J
Revised the shading parts as below:
Table 3-1: Product Features
Error)
Feature
PLL / SSCG PLL
Correct)
Feature
PLL / SSCG PLL
Change Results
See the Traveo™ Platform Hardware Manual in detail.
Use case assumption is following.
PLL
Sound system clock
−
Sound frequency master clock
−
Peripherals
−
Display clock
−
Trace clock
−
SSCG
CPU core
−
GDC core
−
Hyper BUS
−
DDR-HSSPI
−
Product supports down spread and center spread modes with the conditions
defined in 9.1.4.3 "Internal Clock Timing".
See the Traveo™ Platform Hardware Manual in detail.
Use case assumption is following.
PLL
Sound system clock
−
Sound frequency master clock
−
Peripherals
−
Display clock
−
Trace clock
−
SSCG
CPU core
−
GDC core
−
Hyper BUS
−
DDR-HSSPI
−
Product supports down spread and center spread modes with the conditions
defined in 9.1.4.3 "Internal Clock Timing".
Stabilization time is as follows.
100 us for PLL
−
200 us for SSCG
−
S6J3350 Series
Description
Description
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