Infineon Technologies CYPRESS Traveo Series Manual page 14

Ethernet
3.2.1
The following functions are not supported.
External FIFO Interface
Additional Low Latency TX FIFO Interface for DMA configurations
MAC Transmit Block
- half-duplex
- collision
- back pressure
MAC Filtering Block
- external address match
- Wakeup On Lan
Energy Efficient Ethernet support
LPI Operation in Cadence IP
PHY Interface
- GMII
- SGMII
- TBI
10/100/1000 Operation
- 1000 M
SGMII Operation
Jumbo Frames
Physical Control Sub-Layer
Document Number: 002-10634 Rev. *J
Functions
S6J3350 Series
Remarks
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