Infineon Technologies CYPRESS Traveo Series Manual page 159

Notes:
−
T : Ambient temperature (JEDEC)
A
−
T : Case temperature (JEDEC), the maximum measured temperature of package case top.
C
−
Both rating of T and T
A
−
The following condition should be satisfied in order to facilitate heat dissipation.
1. Four or more layers PCB should be used.
2. The area of PCB should be 114.3 mm x 76.2 mm or more, and the thickness should be 1.6 mm or more. (JEDEC
standard)
3. One layer of middle layers at least should be used for dedicated layer to radiate heat with residual copper rate 90 %
or more. The layer can be used for system ground.
4. 35 % or more of the die stage area which is exposed at back surface of package should be soldered to a part of 1
layer.
5. The part of 1
Example thermal via holes on PCB
−
The above figure is a schematic diagram showing PCB in section.
−
Thermal via holes should closely be placed and aligned with lands.
−
It is recommended to connect the land pattern to the VSS-ground level (GND plan of inner layer bellow the MCU) as thermal
heat sink.
Document Number: 002-10634 Rev. *J
should simultaneously be satisfied as maximum operation temperature.
C
st layer should be connected to the dedicated heat radiation layer with more than 10 thermal via holes.
S6J3350 Series
st
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