Infineon Technologies CYPRESS Traveo Series Manual page 192

(5) Serial Chip Select Used (SCSCR: CSEN = 1)
◼
Mark level "H" of serial clock output (SMR, SCSFR: SCINV = 0)
◼
Inactive level "H" of serial chip select (SCSCR, SCSFR: CSLVL = 1)
(T
A
Parameter Symbol
SCS ↑ → SCK ↓
t
CSSI
setup time
SCK ↑ → SCS ↑
t
CSHI
hold time
SCS
t
CSDI
deselect time
SCS ↑ → SCK ↓
t
CSSI
setup time
SCK ↑ → SCS ↑
t
CSHI
hold time
SCS
t
CSDI
deselect time
SCS ↓ → SCK ↓
t
CSSE
setup time
SCK ↑ → SCS ↑
t
CSHE
hold time
SCS
t
CSDE
deselect time
SCS ↓ → SOT
t
DSE
delay time
SCS ↑ → SOT
t
DEE
delay time
Document Number: 002-10634 Rev. *J
: Recommended operating conditions, Vcc3 = 3.3 V ± 0.3 V, Vcc5 = DVcc = 5.0 V ± 10 % / 3.3 V ± 0.3 V,
Vcc53 = 5.0 V ± 10% / 3.3 V ± 0.3 V, V
Pin Name
SCK0, SCK1, SCK2_1,
SCK3_1, SCK4,
SCK8 to SCK12,
SCK16 to SCK17
SCS0x, SCS1x,
SCS2x_1,
SCS3x_1, SCS4,
SCS8x to SCS12x,
SCS16x to SCS17x
SCS0x, SCS1x,
SCS2x_1,
SCS3x_1, SCS4,
SCS8x to SCS12x
SCS16x to SCS17x
SCK2_0, SCK3_0,
SCS2x_0, SCS3x_0
SCS2x_0, SCS3x_0
SCK0 to SCK4,
SCK8 to SCK12
SCS0x to SCS4x,
SCS8x to SCS12x
SCK16 to SCK17,
SCS16x to SCS17x
SCK0 to SCK4,
SCK8 to SCK12,
SCK16 to SCK17,
SCS0x to SCS4x,
SCS8x to SCS12x,
SCS16x to SCS17x
SCS0x to SCS4x,
SCS8x to SCS12x
SCS16x to SCS17x
SCS0x to SCS4x,
SCS8x to SCS12x,
SCS16x to SCS17x,
SOT0 to SOT4,
SOT8 to SOT12,
SOT16 to SOT17
SS
Conditions
Min
t *1 -15
CSSU
*2
Master t +0
CSHD
Mode
(CL = 20pF,
I = -5mA,
OL
I = 5mA)
OH
t *3 -15
CSDS
+5t
CLK_LCPnA
t *3 -15
CSDS
+5t
CLK_COMP
*1
t -10
Master
CSSU
Mode
*2
(CL = 20pF, t +0
CSHD
I = -10mA,
OL
*3
t -10
CSDS
I = 10mA)
OH
+5t
CLK_LCPnA
4t
CLK_LCPnA
+15
4t
CLK_COMP
+15
Slave 0
Mode
(CL = 20pF,
I = -5mA,
OL
4t
CLK_LCPnA
I = 5mA)
OH
+15
4t
CLK_COMP
+15
-
0
S6J3350 Series
= DV = 0.0 V, V 12 = 1.15 V ± 0.06 V)
SS CC
Value
Unit
Max
- ns
- ns
- ns
*4
- ns
- ns
- ns
- ns
*4
*4
- ns
- ns
- ns
*4
- ns
- ns
40 ns
- ns
Page 191 of 307
Remarks