Infineon Technologies CYPRESS Traveo Series Manual page 180

32-bit microcontroller
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CSIO timing (SMR:MD2-0 = 0b010)
(1) Normal Synchronous Transfer (SCR: SPI = 0) and Mark Level "H" of Serial Clock Output (SMR: SCINV = 0)
(T
Parameter
Symbol
Serial clock
t
cycle time
SCK ↓ → SOT
t
SLOVI
delay time
Valid SIN → SCK ↑
t
setup time
SCK ↑→ Valid SIN
t
hold time
Serial clock
t
cycle time
SCK ↓ → SOT
t
SLOVI
delay time
Valid SIN → SCK ↑
t
setup time
SCK ↑→ Valid SIN
t
hold time
Document Number: 002-10634 Rev. *J
: Recommended operating conditions, Vcc3 = 3.3 V ±0.3V, Vcc5 = DVcc = 5.0 V ± 10 % / 3.3 V ± 0.3 V,
A
Vcc53 = 5.0 V ± 10% / 3.3 V ±0.3 V, V
Pin Name
SCK0, SCK1, SCK2_1,
SCK3_1, SCK4,
SCK8 to SCK12
SCYC
SCK16 to SCK17
SCK0, SCK1, SCK2_1,
SCK3_1, SCK4,
SCK8 to SCK12,
SCK16 to SCK17
SOT0, SOT1, SOT2_1,
SOT3_1, SOT4,
SOT8 to SOT12,
SOT16 to SOT17
SCK0, SCK1, SCK2_1,
SCK3_1, SCK4,
IVSHI
SCK8 to SCK12,
SCK16 to SCK17
SIN0, SIN1, SIN2_1,
SIN3_1, SIN4,
SIN8 to SIN12,
SHIXI
SIN16 to SIN17
SCK2_0, SCK3_0
SCYC
SCK2_0, SCK3_0,
SOT2_0, SOT3_0
IVSHI
SCK2_0, SCK3_0,
SIN2_0, SIN3_0
SHIXI
SS
Conditions
Min
8t
CLK_LCPnA
8t
CLK_COMP
Master
-30
Mode
(CL = 20pF,
I
= -5mA,
OL
I
= 5mA)
OH
40
0
2t
CLK_LCPnA
Master
-7.5
Mode
(CL = 20pF,
I
= -10mA,
OL
I
= 10mA)
10
OH
0
S6J3350 Series
= DV
= 0.0 V, V
12 = 1.15 V ± 0.06 V)
SS
CC
Value
Unit
Max
*1
-
ns
-
ns
+30
ns
-
ns
-
ns
*1
-
ns
+7.5
ns
-
ns
-
ns
Page 179 of 307
Remarks
-
-

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