Infineon Technologies CYPRESS Traveo Series Manual page 228

(4) Hyper Bus Read Timing (HyperRAM)
Parameter
Hyper Bus clock cycle
CS↑↓ -> CK↑
Chip Select setup time
DQ -> CK↑↓
Setup time
CK↑↓ -> DQ
Hold time
CK↓ -> CS↑
Chip select hold time
RWDS↑↓> DQ (valid)
Setup time
RWDS↑↓> DQ (invalid)
Hold time
CK↑ -> RWDS↑↓
Refresh Indicator Valid
CK↑ -> RWDS(Hi-z)
Refresh Indicator Hold
Notes: This is Target Spec.
t
RWR
G_CS#_1,2
V
M_CS#_1,2
OL
t
CSS
G_CK
M_CK
t
RIV
G_RWDS
M_RWDS
t
IH
G_DQ7~0
CA0
47-40
M_DQ7~0
Document Number: 002-10634 Rev. *J
(T : Recommended operating conditions, Vcc3 = 3.3 V ± 0.3V, V
A
Symbol Pin Name
t M_CK
RDSCYC
t M_CS#_1,2
CSS
t M_DQ7-0
IS
t M_DQ7-0
IH
t M_CS#_1,2
CSH
t M_DQ7-0
DSS
t M_DQ7-0
DSH
t M_RWDS
RIV
t M_RWDS
RIH
t
CSM
V
OH
V
OL
t
RIH
t
IS
V
IH
CA0 CA1 CA1 CA2 CA2
39- 31-24 23-16 15-8 7-0
32
V
IL
Conditions
t
RDSCYC
(CL = 20pF,
t
RDSCYC
I = -10mA,
OL
I = 10mA),
OH
t
PO
t
t
RDSCYC
DQLZ
t
DSH
V
OH
Dn
15-8
V
OL
S6J3350 Series
= DV
SS
Value
Min Max
10.0 -
-2.0 -
1.25 -
1.25 -
/2 -
-0.8 -
-0.8 -
- 6
0 -
t
CSHI
V
OH
t t
CSH CSS
t
CKDS
t
DSZ
t
V
OZ
OH
t
DSS
Dn Dn+1 Dn+1
7-0 15-8 7-0
= AV = 0.0 V)
SS SS
Unit Remarks
ns
ns
ns
ns
ns
ns
ns
ns
ns
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