Infineon Technologies CYPRESS Traveo Series Manual page 183

(2) Normal Synchronous Transfer (SCR: SPI = 0) and Mark Level "L" of Serial Clock Output (SMR: SCINV = 1)
(T
Parameter Symbol
Serial clock
t
cycle time
SCK ↑ → SOT
t
SHOVI
delay time
Valid SIN → SCK ↓
t
setup time
SCK ↓ → Valid SIN
t
hold time
Document Number: 002-10634 Rev. *J
: Recommended operating conditions, Vcc3 = 3.3 V ± 0.3 V, Vcc5 = DVcc = 5.0 V ±10% / 3.3 V ± 0.3 V,
A
Vcc53 = 5.0 V ± 10 % / 3.3 V ± 0.3 V, V
Pin Name
SCK0, SCK1, SCK2_1,
SCK3_1, SCK4,
SCYC SCK8 to SCK12
SCK16 to SCK17
SCK0, SCK1, SCK2_1,
SCK3_1, SCK4,
SCK8 to SCK12,
SCK16 to SCK17
SOT0, SOT1, SOT2_1,
SOT3_1, SOT4,
SOT8 to SOT12,
SOT16 to SOT17
SCK0, SCK1, SCK2_1,
SCK3_1, SCK4,
IVSLI
SCK8 to SCK12,
SCK16 to SCK17
SIN0, SIN1, SIN2_1,
SIN3_1, SIN4,
SLIXI
SIN8 to SIN12,
SIN16 to SIN17
= DV
SS
Value
Conditions
Min
8t *1
CLK_LCPnA
8t
CLK_COMP
Master
-30
Mode
(CL = 20pF,
I = -5mA,
OL
I = 5mA)
OH
40
0
S6J3350 Series
= 0.0 V, V 12 = 1.15 V ± 0.06 V)
SS CC
Unit Remarks
Max
- ns
- ns
+30 ns
- ns
- ns
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