Texas Instruments TMS320DM6433 Processor Manuals

Manuals and User Guides for Texas Instruments TMS320DM6433 Processor. We have 1 Texas Instruments TMS320DM6433 Processor manual available for free PDF download: Reference Manual

Texas Instruments TMS320DM6433 Reference Manual

Texas Instruments TMS320DM6433 Reference Manual (98 pages)

Digital Media Processor DSP Subsystem

Brand: Texas Instruments | Category: Processor | Size: 0.61 MB

Table of Contents

Table of Contents
3
Preface

9
1 Introduction

11
- Introduction
  12
- Block Diagram
  12
- Tms320Dm643X DMP Block Diagram
  12
  - DSP Subsystem in Tms320Dm643X DMP
    13
    
    Components of the DSP Subsystem
    13
2 Tms320C64X+ Megamodule

15
- Introduction
  16
- Tms320C64X+ CPU
  16
- Tms320C64X+ Megamodule Block Diagram
  17
  - Memory Controllers
    18
    
    L1P Controller
    18
- C64X+ Cache Memory Architecture
  19
  - L1D Controller
    20
  - L2 Controller
    20
  - External Memory Controller (EMC)
    21
  - Internal DMA (IDMA)
    21
  - Internal Peripherals
    22
    
    Interrupt Controller (INTC)
    22
    
    Power-Down Controller (PDC)
    22
    
    Bandwidth Manager
    23
3 System Memory

25
- Memory Map
  26
  - DSP Internal Memory (L1P, L1D, L2)
    26
  - External Memory
    26
  - Internal Peripherals
    26
  - Device Peripherals
    26
- Memory Interfaces Overview
  27
  - DDR2 External Memory Interface
    27
  - External Memory Interface
    27
4 Device Clocking

29
- Overview
  30
- Clock Domains
  30
  - Core Domains
    30
- System Clock Modes and Fixed Ratios for Core Clock Domains
  30
- Overall Clocking Diagram
  31
  - Core Frequency Flexibility
    32
- Example PLL1 Frequencies and Dividers (27 MHZ Clock Input)
  32
  - DDR2/EMIF Clock
    33
- Example PLL2 Frequencies (Core Voltage = 1.2V)
  33
- Example PLL2 Frequencies (Core Voltage = 1.05V)
  33
  - I/O Domains
    34
- Peripheral I/O Domain Clock
  34
  - Video Processing Back End
    35
- VPBE/DAC Clocking
  35
- Possible Clocking Modes
  36
5 PLL Controller

37
6 Power and Sleep Controller

61
7 Power Management

77
- Overview
  78
- PSC and PLLC Overview
  78
- Power Management Features
  78
  - Clock Management
    79
    
    Module Clock Frequency Scaling
    79
    
    Module Clock ON/OFF
    79
    
    PLL Bypass and Power down
    79
  - DSP Sleep Mode Management
    80
    
    DSP Module Clock ON/OFF
    80
    
    DSP Sleep Modes
    80
  - I/O Power down
    81
    
    Video DAC Power down
    81
8 Interrupt Controller

83
9 System Module

85
- Overview
  86
- Device Identification
  86
- Device Configuration
  86
  - Pin Multiplexing Control
    86
  - Device Boot Configuration Status
    86
- I/O Power-Down Control
  87
- Peripheral Status and Control
  87
  - Timer Control
    87
  - VPSS Clock and DAC Control
    87
  - DDR2 VTP Control
    87
  - HPI Control
    87
- Bandwidth Management
  88
  - Bus Master DMA Priority Control
    88
- Tms320Dm643X DMP Master Ids
  88
  - EDMA Transfer Controller Configuration
    89
  - Boot Control
    89
- Tms320Dm643X DMP Default Master Priorities
  89
  - Reset
    91
  - Overview
    92
  - Reset Pins
    92
  - Device Configurations at Reset
    92
10 Reset

92
- Reset Types
  92
  - DSP Reset
    93
    
    DSP Local Reset
    93
    
    DSP Module Reset
    93
11 Boot Modes

95
A Revision History

97
- Document Revision History
  97
- Important Notice
  98

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