Download Print this page

Mitsubishi Electric MELSEC iQ-F FX5 Programming Manual page 55

Instructions, standard functions/function blocks
Hide thumbs Also See for MELSEC iQ-F FX5:

Advertisement

■Adding/subtracting 32-bit binary data
Instruction symbol
Description
[(d)+1, (d)] + [(s)+1, (s)]  [(d)+1, (d)]
D+
D+P
D+_U
D+P_U
[(s1)+1, (s1)] + [(s2)+1, (s2)]  [(d)+1, (d)]
D+
D+P
D+_U
D+P_U
[(s1)+1, (s1)] + [(s2)+1, (s2)]  [(d)+1, (d)]
DADD
DADDP
DADD_U
DADDP_U
[(d)+1, (d)] - [(s)+1, (s)]  [(d)+1, (d)]
D-
D-P
D-_U
D-P_U
[(s1)+1, (s1)] - [(s2)+1, (s2)]  [(d)+1, (d)]
D-
D-P
D-_U
D-P_U
[(s1)+1, (s1)] - [(s2)+1, (s2)]  [(d)+1, (d)]
DSUB
DSUBP
DSUB_U
DSUBP_U
■Multiplying/dividing 16-bit binary data
Instruction symbol
Description
(s1)  (s2)  [(d)+1, (d)]
*
*P
*_U
*P_U
(s1)  (s2)  [(d)+1, (d)]
MUL
MULP
MUL_U
MULP_U
(s1)  (s2)  quotient (d), remainder (d)+1
/
/P
/_U
/P_U
(s1)  (s2)  quotient (d), remainder (d)+1
DIV
DIVP
DIV_U
DIVP_U
Reference
Page 194
Page 195
Page 197
Page 199
Page 201
Page 203
Reference
Page 205
Page 207
Page 209
Page 211
3 CPU MODULE INSTRUCTION
3.2 Basic Instruction
3
53

Hide quick links:

Advertisement

loading