Bootbus - Sun Microsystems Netra T4 AC100 Service And System Reference Manual

FIGURE 10-10
10.2.5

BootBus

The CPU modules support an alternate 8-bit bus (the BootBus) used after a reset to
fetch the first instruction they execute.
The address space of the BootBus corresponds to the boot PROM addressing space
as defined by the Sun4u/Sun5 architecture. The CPU issues its SPARC V9
RED_MODE trap vectors from this address space.
CPU
SBC
6
I chip
4
4 4 4
System Interrupt Block Diagram
CPU
Sun CrossBar
Interconnect
1
2
14
4
Chapter 10 Functional Description 10-17