Sun Microsystems Netra T4 AC100 Service And System Reference Manual page 162

Addr[15:0]
L
A
T
LE_L[1:0]
C
H
RAS[1:0]
CPU
CKE[3:0]
module
CS[3:0]
L
CAS[1:0]
A
T
WE[1:0]
C
H
LE_L[1:0]
144-bit
data
CPMS
FIGURE 10-5
10-8 Netra T4 AC100/DC100 Service and System Reference Manual • August 2001
Addr[15:0]
Addr[15:0]
ADDR
DIMM
Addr[15:0]
RAS0_L
CKE0
CS0
RAS2_L
CKE2
CS2
CAS0_L
WE0_L
DATA
Addr[15:0]
ADDR
DIMM
RAS1_L
CKE1
CS1
RAS3_L
CKE3
CS3
CAS1_L
WE1_L
DATA
Main Memory Functional Block Diagram
Addr[15:0]
ADDR ADDR
DIMM DIMM
RAS0_L RAS0_L
CKE0 CKE0
CS0 CS0
RAS2_L RAS2_L
CKE2 CKE2
CS2 CS2
CAS0_L CAS0_L
WE0_L WE0_L
DATA DATA
576-bit data
Addr[15:0]
ADDR ADDR
DIMM DIMM
RAS1_L RAS1_L
CKE1 CKE1
CS1 CS1
RAS3_L RAS3_L
CKE3 CKE3
CS3 CS3
CAS1_L CAS1_L
WE1_L WE1_L
DATA DATA
576-bit data
Addr[15:0]
ADDR
DIMM
RAS0_L
CKE0
CS0
RAS2_L
CKE2
CS2
CAS0_L
WE0_L
DATA
Addr[15:0]
ADDR
DIMM
RAS1_L
CKE1
CS1
RAS3_L
CKE3
CS3
CAS1_L
WE1_L
DATA