Sun Microsystems Netra T4 AC100 Service And System Reference Manual page 158

The CPU is physically mounted on a module that plugs vertically into the system
motherboard. The module contains the processor and eight external cache SRAMs,
available either as 4-Mbyte (8 x 4-Mbit) SRAMs or as 8 Mbyte (8 x 8 Mbit) SRAMs.
The module also includes a DC-to-DC converter to limit the current density in the
connector at the male/female interface and provide better power regulation at the
pins of the processor.
CPU Modules
I2C, JTAG
BBC
Ebus
FIGURE 10-2
The base CPU module frequency is 750 MHz.
Note – The two UltraSPARC-III CPUs need not run at the same frequency.
Each CPU module plugs vertically into the motherboard through a set of two
connectors. Each module is equipped with a mechanical insertion/extraction
mechanism.
10-4 Netra T4 AC100/DC100 Service and System Reference Manual • August 2001
E$ E$ E$ E$
E$ E$ E$ E$
300MHz Data
288 bits
UltraSPARC III
CPU 1
Private CPU 0 Bus 144 bits
Private CPU 1 Bus 144 bits
CPMS CPMS
Sun Crossbar Interconnect Data Bus (internal)
UltraSPARC-III Processor Functional Block Diagram
E$ E$
E$ E$
300MHz
UltraSPARC III
CPU 0
CPMS CPMS CPMS
E$ E$
E$ E$
Data
288 bits
Address
Memory
Subsystem
Control
576 bits
CPMS