Mdio Register Overview; Mdio Single Command ($0X680); Mdio Single Read And Write Data ($0X681); Datasheet - Intel IXF1104 Datasheet

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Intel IXF1104 4-Port Gigabit Ethernet Media Access Controller
8.4.8

MDIO Register Overview

Table 142 through
Table 142. MDIO Single Command ($0x680)
Bit Name
Register Description: Gives the CPU the ability to perform single MDIO read and write
accesses to the external PHY for ports that are configured in copper mode.
31:21 Reserved
20 MDIO Command
19:18 Reserved
17:16 OP Code
15:10 Reserved
9:8 PHY Address
7:5 Reserved
4:0 REG Address
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
clear; R/W/C = Read/Write, Clear on Write
Table 143. MDIO Single Read and Write Data ($0x681)
Bit Name
Register Description: MDIO read and write data.
31:16 MDIO Read Data
15:0 MDIO Write Data
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
clear; R/W/C = Read/Write, Clear on Write
211
Table 145 provide an overview of the MDIO registers.
Description
Reserved
Performs the MDIO operation. Cleared when
done.
0 = MDIO ready, operation complete
1 = Perform operation
Reserved
MDIO Op Code; two bits identify operation to be
performed:
00 = Reserved
01 = Write operation (as defined in IEEE 802.3,
clause 22.2.4.5)
10 = Read operation (as defined in IEEE 802.3,
clause 22.2.4.5)
11 = Reserved
Reserved
Sets bits 1:0 of the external PHY address. Bits 4:2
of the PHY address are fixed at 000.
Reserved
Five-bit address to one among 32 registers in an
addressed PHY device.
Description
MDIO Read data from external device.
MDIO Write data to external device.
1
Type Default
0x00010000
RO 00000000000
R/W 0
RO 00
R/W 01
RO 000000
R/W 00
RO 000
R/W 00000
1
Type Default
0x00000000
RO 0x0000
R/W 0x0000

Datasheet

Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005