Rx Statistics; Tx Statistics; Loss-Less Flow Control; Datasheet - Intel IXF1104 Datasheet

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Intel IXF1104 4-Port Gigabit Ethernet Media Access Controller
The register should be programmed to 0x2667 for the 9.6 KB length jumbo frame, optimized for
the IXF1104 MAC. The RMON counters are also implemented for jumbo frame support as
follows:
5.1.6.1

Rx Statistics

•
RxOctetsTotalOK (Addr: Port_Index + 0x20)
•
RxPkts1519toMaxOctets (Addr: Port_Index + 0x2B)
•
RxFCSErrors (Addr: Port_Index + 0x2C)
•
RxDatatError (Addr: Port_Index = 0x02E)
•
RxAlignErrors (Addr: Port_Index + 0x2F)
•
RxLongErrors (Addr: Port_Index + 0x30)
•
RxJabberErrors (Addr: Port_Index + 0x31)
•
RxVeryLongErrors (Addr: Port_Index + 0x34)
5.1.6.2

TX Statistics

•
OctetsTransmittedOK (Addr: Port_Index + 0x40)
•
TxPkts1519toMaxOctets (Addr: Port_Index + 0x4B)
•
TxExcessiveLengthDrop (Addr: Port_Index + 0x53)
•
TxCRCError (Addr: Port_Index + 0x56)
The IXF1104 MAC checks the CRC for all legal-length jumbo frames (frames between 1519 and
the Max Frame Size). On transmission, the MAC can be programmed to append the CRC to the
frame or check the CRC and increment the appropriate counter. On reception, the MAC transmits
these frames across the SPI3 interface (jumbo frames above the setting in the
Threshold Port 0 ($0x5B8)"
interface). If the receive frame has a bad CRC, the appropriate counter is incremented and the
RxERR flag is asserted on the SPI3 receive interface.
Jumbo frames also impact flow control. The maximum frame size needs to be taken into account
when determining the FIFO watermarks. The current transmission must be completed before a
Pause frame is transmitted (needed when the receiver FIFO High watermark is exceeded). If the
current transmission is a jumbo frame, the delay may be significant and increase data loss due to
insufficient available FIFO space.
5.1.6.3

Loss-less Flow Control

The IXF1104 MAC supports loss-less flow control when the size of a Jumbo packet is restricted to
9.6 k bytes. If this condition is met, the IXF1104 MAC has sufficient memory resources allocated
to each MAC port to ensure that, if both the IXF1104 MAC and link partner are required to send
Pause packets simultaneously during jumbo packet transfers across a medium of five kilometers of
fiber, no packet data should be lost due to FIFO overflows.
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with a bad CRC cannot be dropped and are sent across the SPI3
"RX FIFO Transfer

Datasheet

Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005