Port Multicast Address ($ Port_Index +0X1A – +0X1B); Datasheet - Intel IXF1104 Datasheet

®
Intel IXF1104 4-Port Gigabit Ethernet Media Access Controller
Table 91. RX Packet Filter Control ($ Port_Index + 0x19) (Sheet 2 of 2)
Bit Name
2 B/Cast Drop En
1 M/Cast Match En
0 U/Cast Match En
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
clear; R/W/C = Read/Write, Clear on Write
2. Used in conjunction with the
frame to be dropped in the RX FIFO. Otherwise, the frame is sent out the SP3 interface and may be
optionally signaled with an RERR (see bit 0 of
Table 92. Port Multicast Address ($ Port_Index +0x1A – +0x1B)
Name
Port Multicast
Address Low
Port Multicast
Address High
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear;
R/W/C = Read/Write, Clear on Write
173
Description
This bit enables a Global filter on broadcast
frames.
0 = All broadcast frames are passed to the SPI3
Interface.
1 = All broadcast frames are dropped.
This bit enables a filter on multicast frames.
0 = All muticast frames are good and passed to
the SPI3 Interface.
1 = Only multicast frames with a destination
address that matches the
PortMulticastAddress are forwarded. All other
muticast frames are dropped.
This bit enables a filter on unicast frames.
0 = All unicast frames are good and are passed
to the SPI3 Interface.
1 = Only unicast frames with a Destination
Address that matches the Station Address
2
are forwarded. All other unicast frames are
2
dropped.
NOTE: The VLAN filter overrides the unicast filter.
Therefore, a VLAN frame cannot be
filtered based on the unicast address.
"RX FIFO Errored Frame Drop Enable ($0x59F)" on page
"SPI3 Receive Configuration
Description
This address compares against multicast frames
at the receiving side if multicast filtering is
enabled.
This register contains bits 31:0 of the address.
This address compares against multicast frames
at the receiving side if Multicast filtering is
enabled.
This register contains bits 47:32 of the address.
1
Type Default
R/W
2
R/W
2
R/W
196. This allows the
($0x701)".
*
Address Type Default
Port_Index
R/W 0x0000000
+ 0x1A
Port_Index
R/W 0x00000000
+ 0x1B

Datasheet

Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005
0
0
0