Phy Status ($ Port Index + 0X61); Datasheet - Intel IXF1104 Datasheet

4-port gigabit ethernet media access controller
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Table 95. PHY Control ($ Port Index + 0x60) (Sheet 2 of 2)
Bit
Name
Auto-Negotiation
12
Enable
11
Power-Down
10
Isolate
Restart
9
Auto-Negotiation
8
Duplex Mode
7
Collision Test
Speed Selection
6
1000 Mbps
5:0
Reserved
1. RO = Read Only; RR = Clear on Read; W = Write; R/W = Read/Write
2. This register is ignored if auto-negotiation is enabled.
Table 96. PHY Status ($ Port Index + 0x61) (Sheet 1 of 2)
Bit
Name
31:16
Reserved
15
100BASE-T4
100BASE-X
14
Full-Duplex
100BASE-X
13
Half-Duplex
10 Mbps
12
Full-Duplex
1. R = Read Only; RR = Clear on Read; W = Write; R/W = Read/Write

Datasheet

Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005
®
Intel
IXF1104 4-Port Gigabit Ethernet Media Access Controller
Description
0 = Disable auto-negotiation process
1 = Enable auto-negotiation process
This register bit must be enabled for
1000BASE-T operation.
0 = Normal operation
1 = Power-down
0 =
1 = Electrically isolate PHY from GMII
0 = Normal operation
1 = Restart auto-negotiation process
0 = Half-duplex mode
1 = Full-duplex mode
0 = Disable COL signal test
1 = Enable COL signal test
This register bit is ignored unless loopback is
enabled (Register bit 0.14 = 1)
0.6 (Speed<1>) 0.13 (Speed<0>)
00 = 10 Mbps
01 = 100 Mbps
10 = 1000 Mbps (manual mode now allowed)
11 = Reserved
Reserved
Description
Reserved
0 = PHY not able to operate in 100BASE-T4
1 = PHY able to operate in 100BASE-T4
0 = PHY not able to operate in 100BASE-X in full-
duplex mode
1 = PHY able to operate in 100BASE-X in full-
duplex mode
0 = PHY not able to operate in 100BASE-X in
half-duplex mode
1 = PHY able to operate in 100BASE-X in half-
duplex mode
0 = PHY not able to operate in 10 Mbps in full-
duplex mode
1 = PHY able to operate in 10 Mbps in full-duplex
mode
1
Type
Default
RO
1
RO
0
RO
0
RO
0
2
RO
1
RO
0
2
RO
0
RO
0
1
Type
Default
0x001111001
00001001
RO
0
RO
0
RO
1
RO
1
RO
1
182

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