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Table 30. Intel
IXF1104 MAC-to-SFP Optical Module Interface Connections (Sheet 2 of 2)
IXF1104 MAC
Signal Names
TX_DISABLE_0:3
TX_FAULT_0:3
RX_LOS_0:3
5.7.2
Functional Descriptions
5.7.2.1
High-Speed Serial Interface
These signals are responsible for transfer of the actual data at 1.25 Gbps.
Specifications" on page 134
The following signals are required to implement the high-speed serial interface:
•
TX_P_0:3
•
TX_N_0:3
•
RX_P_0:3
•
RX_N_0:3
5.7.2.2
Low-Speed Status Signaling Interface
The following Low-Speed signals indicate the state of the line through the Optical Module
Interface:
•
MOD_DEF_0:3
•
TX_FAULT_0:3
•
RX_LOS_0:3
•
TX_DISABLE_0:3
•
MOD_DEF_INT
•
TX_FAULT_INT
•
RX_LOS_INT
5.7.2.2.1 MOD_DEF_0:3
MOD_DEF_0:3 are direct inputs to the IXF1104 MAC and are pulled to a logic Low level during
normal operation, indicating that a module is present for each channel respectively. If a module is
not present, a logic High is received, which is achieved by an external pull-up resistor at the
IXF1104 MAC device pad.
The status of each bit (one for each port) is found in bits [3:0] of the
0-3 ($0x799)" on page
MOD_DEF_INT output if this operation is enabled.
Datasheet
Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005
®
Intel
IXF1104 4-Port Gigabit Ethernet Media Access Controller
SFP Signal
Description
Names
Transmitter disable, logic High,
TX DISABLE
open collector compatible
Transmitter fault, logic High, open
TX FAULT
collector compatible
Receiver loss-of-signal, logic High,
LOS
open collector compatible
shows the data is 8B/10B encoded and transmitted differentially.
222). Any change in the state of these bits causes a logic Low level on the
Notes
Output from the IXF1104 MAC
Input to the IXF1104 MAC
Input to the IXF1104 MAC
Table 41 "DC
"Optical Module Status Ports
108
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