Instruction Register And Supported Instructions; Instruction Register Description; Datasheet - Intel IXF1104 Datasheet

5.10.2

Instruction Register and Supported Instructions

The instruction register is a 4-bit register that enacts the boundary scan instructions. After the state
machine resets, the default instruction is IDCODE. The decode logic in the TAP controller selects
the appropriate data register and configures the boundary scan cells for the current instruction.
Table 38 shows the supported boundary-scan instructions.
Table 38. Instruction Register Description
Instruction
BYPASS
EXTEST
SAMPLE
IDCODE
HIGHZ
CLAMP

Datasheet

Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005
®
Intel IXF1104 4-Port Gigabit Ethernet Media Access Controller
Code Description
1111 1-bit Bypass
0000 External Test
0001 Sample Boundary
0110 ID Code Inspection
0101 Float Boundary
0111 Clamp Boundary
Data Register
Bypass
Boundary Scan
Boundary Scan
ID
Bypass
Bypass
124