High-Speed Counter Interrupts - Omron CP1L Operation Manual

Interrupt Functions
6-1-5

High-speed Counter Interrupts

Procedure
Scheduled interrupt 2 is executed every 30.5 ms.
W 0.00
30.5 ms
Internal
clock
Cyclic task Cyclic task
processing processing
This function executes the specified interrupt task (0 to 255) when the CP1L
CPU Unit's built-in high-speed counter PV matches a pre-registered value
(target value comparison) or lies within a pre-registered range (range compar-
ison).
• CTBL(882) is used to register the comparison table.
• Either CTBL(882) or INI(880) can be used to start comparison.
• INI(880) is used to stop comparison.
For details on the built-in high-speed counter, refer to 5-1 High-speed
Counters .
Set the PLC Setup.
↓
Wire the inputs.
↓
Write the ladder program.
30.5 ms
Cyclic task
Interrupt
Interrupt
processing
Interrupt Interrupt
task 2
task 2
• Using the CX-Programmer, set the PLC
Setup so that the built-in input is used for a
high-speed counter.
• Wire the input being used for the high-speed
counter.
• Write the interrupt task program.
• Use CTBL(882) to register the high-speed
counter number and comparison table. Cre-
ate the comparison table's data in advance.
Section 6-1
30.5 ms
Cyclic task
Interrupt
processing
Interrupt
task 2
353