I/O Bits Allocated To Expansion I/O Units - Omron CP1L Operation Manual

I/O Area and I/O Allocations
4-2-2

I/O Bits Allocated to Expansion I/O Units

Unit
Unit with 8 inputs CP1W-8ED
CPM1A-8ED
Unit with Relays CP1W-8ER
8 outputs CPM1A-8ER
Sinking CP1W-8ET
transistors CPM1A-8ET
Sourcing CP1W-8ET1
transistors CPM1A-8ET1
Relays
Unit with CP1W-16ER
16 out- CPM1A-16ER
puts
Sinking CP1W-16ET
transistors
Sourcing
CP1W-16ET1
transistors
Unit with Relays CP1W-20EDR1
20 I/O CPM1A-20EDR1
Sinking CP1W-20EDT
transistors CPM1A-20EDT
Sourcing CP1W-20EDT1
transistors CPM1A-20EDT1
Unit Relays CP1W-32ER
with 32
outputs
Sinking CP1W-32ET
transistors
Sourcing CP1W-32ET1
transistors
Unit with Relays CP1W-40EDR
40 I/O CPM1A-40EDR
Sinking CP1W-40EDT
transistors CPM1A-40EDT
Sourcing CP1W-40EDT1
transistors CPM1A-40EDT1
148
00 to 07 in CIO 0) and output bits CIO 101.00 to CIO 101.07 (i.e., bits 00 to 07
in CIO 1).
The upper bits (bits 12 to 15) not used in the input words cannot be used as
work bits. Only the bits not used in the output words can be used as work bits.
There are Expansion I/O Units for expanding inputs, for expanding outputs,
and for expanding both input and outputs. I/O bits starting from bit 00 in the
next word after the word allocated to the previous Expansion Unit, Expansion
I/O Unit, or CPU Unit are automatically allocated. This word is indicated as
"CIO m" for input words and as "CIO n" for output words.
Input bits
No. of No. of
bits words
8 bits 1 word CIO m (bits 00 to 07)
--- None None
--- None None
--- None None
--- None None
--- None None
--- None None
12 bits 1 word CIO m (bits 00 to 11)
12 bits 1 word CIO m (bits 00 to 11)
12 bits 1 word CIO m (bits 00 to 11)
--- None None
--- None None
--- None None
24 bits 2 words CIO m (bits 00 to 11)
CIO m+1 (bits 00 to 11)
24 bits 2 words CIO m (bits 00 to 11)
CIO m+1 (bits 00 to 11)
24 bits 2 words CIO m (bits 00 to 11)
CIO m+1 (bits 00 to 11)
Addresses No. of
bits
---
8 bits
8 bits
8 bits
16 bits 2 words CIO n (bits 00 to 07)
16 bits 2 words CIO n (bits 00 to 07)
16 bits 2 words CIO n (bits 00 to 07)
8 bits
8 bits
8 bits
32 bits 4 words CIO n (bits 00 to 07)
32 bits 4 words CIO n (bits 00 to 07)
32 bits 4 words CIO n (bits 00 to 07)
16 bits 2 words CIO n (bits 00 to 07)
16 bits 2 words CIO n (bits 00 to 07)
16 bits 2 words CIO n (bits 00 to 07)
Section 4-2
Output bits
No. of Addresses
words
None None
1 word CIO n (bits 00 to 07)
1 word CIO n (bits 00 to 07)
1 word CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
1 word CIO n (bits 00 to 07)
1 word CIO n (bits 00 to 07)
1 word CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+2 (bits 00 to 07)
CIO n+3 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+2 (bits 00 to 07)
CIO n+3 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+2 (bits 00 to 07)
CIO n+3 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+1 (bits 00 to 07)