Omron CP1L Operation Manual page 82

Specifications
Type
Model
Function blocks
Instruction length
Instructions
Instruction
execution time
Common
processing time
Number of
connectable Expan-
sion Units and Expan-
sion I/O Units
Maximum number of
I/O points
Built-in Built-in I/O
terminals
(Func-
tions can
Inter- Direct
be
rupt mode
assigned.)
inputs
Counter
mode
Quick-
response
inputs
High-speed
counters
Pulse Pulse outputs • 2 outputs, 1 Hz to 100 kHz (J models : 1kHz to 20kHz)
outputs
(Tran-
sistor
PWM outputs
output
models
only)
Analog Analog
settings adjuster
External
analog
setting
48
M CPU Units
CP1L-M60DR-A CP1L-M40DR-A
CP1L-M60DR-D CP1L-M40DR-D
CP1L-M60DT-A CP1L-M40DT-A
CP1L-M60DT-D CP1L-M40DT-D
CP1L-M60DT1-D CP1L-M40DT1-D
Maximum number of function block definitions: 128
Maximum number of instances: 256
Languages usable in function block definitions: Ladder diagrams, structured text (ST)
Function blocks cannot be used in CP1L-J CPU Unit.
1 to 7 steps per instruction
Approx. 500 (function codes: 3 digits)
Basic instructions: 0.61 µs min.
Special instructions: 4.1 µs min.
0.38 ms
3 Units (CP Series or CPM1A)
180 points 160 points
(60 built in, (40 built in,
40 × 3 40 × 3
expansion) expansion)
60 terminals 40 terminals
(36 inputs and (24 inputs and
24 outputs) 16 outputs)
6 inputs
Response time: 0.3 ms
6 inputs
Response frequency: 5 kHz total, 16 bits
Incrementing counter or decrementing counter
6 points
Min. input pulse width: 50 µs max.
4 inputs/2 axes (24 VDC)
• Single phase (pulse plus direction, up/down, increment), 100 kHz (J models : 20kHz)
• Differential phases (4×), 50 kHz (J models : 10kHz)
Value range: 32 bits, Linear mode or ring mode
Interrupts: Target value comparison or range comparison
(CCW/CW or pulse plus direction)
Trapezoidal or S-curve acceleration and deceleration (Duty ratio: 50% fixed)
2 outputs, 0.1 to 6,553.5 Hz or 1 to 32,800 Hz
Variable duty ratio: 0.0% to 100.0% (in increments of 0.1% or 1%)
(Accuracy: ±5% at 1 kHz)
1 (Setting range: 0 to 255)
1 input (Resolution: 1/256, Input range: 0 to 10 V)
CP1L-M30DR-A CP1L-L20DR-A
CP1L-M30DR-D CP1L-L20DR-D
CP1L-M30DT-A CP1L-L20DT-A
CP1L-M30DT-D CP1L-L20DT-D
CP1L-M30DT1-D CP1L-L20DT1-D
CP1L-J20DR-A
CP1L-J20DR-D
CP1L-J20DT1-D
1 Unit (CP Series or CPM1A)
150 points 60 points
(30 built in, (20 built in,
40 × 3 40 × 1
expansion) expansion)
30 terminals 20 terminals
(18 inputs and (12 inputs and
12 outputs) 8 outputs)
Section 2-2
L CPU Units
CP1L-L14DR-A CP1L-L10DR-A
CP1L-L14DR-D CP1L-L10DR-D
CP1L-L14DT-A CP1L-L10DT-A
CP1L-L14DT-D CP1L-L10DT-D
CP1L-L14DT1-D CP1L-L10DT1-D
CP1L-J14DR-A
CP1L-J14DR-D
CP1L-J14DT1-D
0 Unit
54 points 10 points
(14 built in, (10 built in)
40 × 1
expansion)
14 terminals 10 terminals
(8 inputs and 6 (6 inputs and 4
outputs) outputs)
4 inputs 2 inputs
4 inputs 2 inputs
4 points 2 points