Omron CP1L Operation Manual page 99

Specifications
Item
2.5 µs max.
OFF delay
Circuit configuration
High-speed Counter Inputs
High-speed Counter Inputs
CIO 0.00 to CIO 0.03
Note (1) HIgh-speed counter inputs, interrupt inputs, and quick-response inputs
can also be used as normal inputs.
(2) The bits that can be used depend on the model of CPU Unit.
(3) The response time is the hardware delay value. The delay set in the PLC
Setup (0 to 32 ms, default: 8 ms) must be added to this value.
Bit
CIO 0.00,
CIO 0.02
CIO 0.01,
CIO 0.03
CIO 0.04,
CIO 0.05
Max. count
frequency
Specification
Interrupt Inputs and
Quick-response Inputs
CIO 0.04 to CIO 0.09 (See
note 1.)
50 µs max.
Input bits: CIO 0.04 to CIO 0.11
IN
1000 pF
3.0 kΩ
IN
COM
Input bits: CIO 0.00 to CIO 0.03, CIO 1.00 to CIO 1.03
IN
1000 pF
3.0 kΩ
IN
COM
Input bits: CIO 1.04 to CIO 1.11
IN
4.7 kΩ
IN
COM
Differential Pulse plus
phase mode direction input
A-phase pulse Pulse input
input
B-phase pulse Direction input
input
Z-phase pulse input or hardware reset input (Can be used as ordinary
inputs when high-speed counter is not being used.)
50 kHz (4×) 100 kHz
CIO 0.10 to CIO 0.11 and
CIO 1.00 to 1.11 (See note 2.)
1 ms max. (See note 3.)
Input LED
Internal
circuits
Input LED
Internal
circuits
Input LED
Internal
circuits
Up/down input
mode
mode
Increment pulse
input
Decrement
pulse input
Section 2-2
Normal inputs
Increment
mode
Increment pulse
input
Normal input
65