Transmitter - External Power Amplifier And Subcarrier Detector; Trf7970A Ic Communication Interface - Texas Instruments TRF7970A Manual

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6.9 Transmitter – External Power Amplifier and Subcarrier Detector
The TRF7970A can be used in conjunction with an external TX power amplifier or external subcarrier
detector for the receiver path. In this case, certain registers must be programmed as shown here:
• Bit B6 of the Regulator and I/O Control register (0x0B) must be set to 1. This setting has two functions:
first, to provide a modulated signal for the transmitter if needed, and second, to configure the
TRF7970A receiver inputs for an external demodulated subcarrier input.
• Bit B3 of the Modulation and SYS_CLK Control register (0x09) must be set to 1 (see
Section 6.15.3.2.8). This function configures the ASK/OOK pin for either a digital or analog output
(B3 = 0 enables a digital output, B3 = 1 enables an analog output). The design of an external power
amplifier requires detailed RF knowledge. There are also readily designed and certified high-power HF
reader modules on the market.

6.10 TRF7970A IC Communication Interface

6.10.1 General Introduction
The communication interface to the reader can be configured in two ways: with a eight line parallel
interface (D0:D7) plus DATA_CLK, or with a 4-wire Serial Peripheral Interface (SPI). The SPI interface
uses traditional Master Out/Slave In (MOSI), Master In/Slave Out (MISO), Slave Select, and DATA_CLK
lines.
These communication modes are mutually exclusive; that is, only one mode can be used at a time in the
application.
When the SPI interface is selected, the unused I/O_2, I/O_1, and I/O_0 pins must be hard-wired as shown
in Table 6-10. At power up, the TRF7970A samples the status of these three pins and then enters one of
the possible SPI modes.
The TRF7970A always behaves as the slave device, and the microcontroller (MCU) behaves as the
master device. The MCU initiates all communications with the TRF7970A, and the TRF7970A makes use
of the Interrupt Request (IRQ) pin in both parallel and SPI modes to prompt the MCU for servicing
attention.
Table 6-10. Pin Assignment in Parallel and Serial Interface Connection or Direct Mode
PIN PARALLEL
DATA_ CLK DATA_CLK
I/O_7 A/D[7]
I/O_6 A/D[6]
(4)
I/O_5 A/D[5]
I/O_4 A/D[4]
I/O_3 A/D[3]
I/O_2 A/D[2]
I/O_1 A/D[1]
I/O_0 A/D[0]
IRQ IRQ interrupt
(1) FIFO is not accessible in SPI without SS mode. See the
(2) MOSI = master out, slave in
(3) MISO = master in, slave out
(4) I/O_5 pin is used only for information when data is put out of the chip (for example, reading 1 byte from the chip). It is necessary first to
write in the address of the register (8 clocks) and then to generate another 8 clocks for reading out the data. The I/O_5 pin goes high
during the second 8 clocks. But for normal SPI operations, I/O_5 pin is not used.
(5) Slave select pin is active low
Copyright © 2011–2017, Texas Instruments Incorporated
PARALLEL (DIRECT MODE)
DATA_CLK
Not used
Direct mode, data out (subcarrier
or bit stream)
Direct mode, strobe – bit clock
out
Not used
Not used
Not used
Not used
Not used
IRQ interrupt
TRF7970A Silicon Errata
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SLOS743L – AUGUST 2011 – REVISED MARCH 2017
SPI WITH SS
DATA_CLK from master
(2)
MOSI = data in (reader in)
(3)
MISO = data out (MCU out)
(4)
See .
(5)
SS – slave select
Not used
At VDD
At VDD
At V
SS
IRQ interrupt
for detailed information.
TRF7970A
TRF7970A
(1)
SPI WITHOUT SS
DATA_CLK from master
(2)
MOSI = data in (reader in)
(3)
MISO = data out (MCU out)
(4)
See .
Not used
Not used
At VDD
At V
SS
At V
SS
IRQ interrupt
Detailed Description 31