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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Introduction The LatticeXP2™ Advanced Evaluation Board provides a convenient platform to evaluate, test and debug user designs and IP cores targeted for the LatticeXP2-17 FPGA. The board features of a LatticeXP2-17 FPGA in a 484 fpBGA package.
LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide • Prototyping areas with access to 14 I/O pins • Selectable I/O bank voltages • Four pairs of SMA connectors for high speed differential signals • Oscillator socket for both half-size and full-size oscillators •...
LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide while, it’s best to put it back in the static shielding bag. Please save the static shielding bag and packing box for future storage of the board when it is not in use.
LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide LatticeXP2 Device This board features a LatticeXP2 FPGA with a 1.2V DC core in a 484-ball fpBGA package. The default device is the LatticeXP2-17. Any other LatticeXP2 density in this package can be accommodated. A complete description of this device can be found on the Lattice web site at www.latticesemi.com.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide For the VCC_ADJ adjustable voltage, the ispPAC-POWR1220AT8 will detect the voltage rail and show the status using five LEDs. Each of these five LEDs indicates a particular voltage range. If the VCC_ADJ is in one of the volt- age ranges, the corresponding LED will be turned ON and the other LEDs will be turned OFF, otherwise these five LEDs will be turned ON and then OFF sequentially so that you will see a light keep moving between the LEDs.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Table 7. Mixed Voltage I/O Support Input sysIO Standards Output sysIO Standards 1.2V 1.5V 1.8V 2.5V 3.3V 1.2V 1.5V 1.8V 2.5V 3.3V CCIO 1.2V 1.5V 1.8V 2.5V 3.3V For example, if V is 3.3V then signals from devices powered by 1.2V, 2.5V, or 3.3V can be input and the thresh-...
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Prototype Areas For general purpose I/O testing or monitoring, numerous test points are provided for direct access. Some test points are grouped together and arranged in a grid pattern according to their associated I/O bank and are labeled with the pin locations on the silkscreen of the board.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide The 16-pin socket will allow connection to PLL clock pin A2 when the top of the oscillator is aligned to socket pins 1 and 16. Note that the SMA connector J12 is shared with the on-board oscillator. When installing the oscillator to connect the clock to PLL clock pin A2, the SMA connector J12 cannot be used and the jumper on J17 needs to be installed.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Table 11. JTAG Programming Headers Separate Programming Chained Programming Jumper on J49 (None on J45) Jumper on J45 (None on J49) J39 Function J40 Function J39 Function J40 Function Vcc (3.3V) Vcc (3.3V) Vcc (3.3V)
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide SW2 and SW8 on the right side and the upper side of the board are 8-pin DIP switches. The pull-up resistors asso- ciated with these switches are wired to 3.3V. A switch in the down position produces a low (0), the up position pro- duces a high (1).
LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Seven Segment Display The 7-segment LED located near the eight LEDs is controlled by LatticeXP2 Bank 4 I/O pins. The connections of the segments are shown in Figure 3. Figure 3. 7-Segment Display The LCD module connector (J55) is a 2x9 header.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Lumex: • LCM-S01601 Series: 16 characters x 1 line • LCM-S00802 Series: 8 characters x 2 lines • LCM-S01602 Series: 16 characters x 2 lines • LCM-S02002 Series: 20 characters x 2 lines •...
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Table 20. CompactFlash Connection (Continued) Pin # Function LatticeXP2 I/O Pin # Function LatticeXP2 I/O WP/IOIS16/IOCS16 — USB 1.1 For implementing the USB interface, the LatticeXP2 board contains a USB 1.1 transceiver MAX3454EETE (or NCN2500MNR2 from On Semiconductor), a type-A connector and a type-B USB connector.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Table 23. Connections Between USB 1.1 Transceiver and LatticeXP2 (Continued) Pin # MAX3454EETE NCN2500MNR2 LatticeXP2 I/O Description ENUM Vobus — Connect to J21 pin 2 Vbus Vusb — Connect to USB connectors —...
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Table 28. PCI Connector Component Side J11 Pin# Signal Description LatticeXP2 Connection 12V voltage supply pin — PCI JTAG TCK signal — System ground JTAG TDO signal — 5V voltage supply pin —...
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Table 28. PCI Connector Component Side (Continued) J11 Pin# Signal Description LatticeXP2 Connection AD[12] PCI address and data bit 12 AD[10] PCI address and data bit 10 M66EN PCI 66 MHz enable —...
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Table 29. PCI Connector Solder Side (Continued) J56 Pin# Signal Description LatticeXP2 Connection System ground AD[18] PCI address and data bit 18 AD[16] PCI address and data bit 16 +3.3V 3.3V voltage supply pin +3.3V...
LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Table 30. ADC Connections Description LatticeXP2 I/O sysIO Bank BUSYN 4-Output DAC U5 is the quad DAC (Digital to Analog Converter) DAC7617 IC. The four analog outputs, AOUT0 to AOUT3, are available at connector J10. The full scale values for the DAC outputs will match that of the AREF signal described below.
LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide USB Download The evaluation board has a USB download cable built in. The built-in cable consists of a USB Type-B connector (J33), a USB microcontroller, and a MachXO device. To use the built-in download cable, simply connect a standard USB cable from J33 to your PC (with ispVM System software installed).
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide The following device programming sections provide procedures for programming the on-board SPI Flash using either a standard USB cable, or an ispDOWNLOAD cable (parallel or USB). If you would like to program the...
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide open as shown in Figure 6. Select Device Access Options and SPI Flash Programming as shown in Figure 7. Figure 6. Device Information Dialog Figure 7. SPI Serial Flash Device Dialog 8. Select Browse and point to the location of the bitstream file. Note that if you have a “.JED” file output from isp- LEVER, you can convert it to a “.BIT”...
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Figure 8. Select Device Dialog 10. Check that the SPI Serial Flash Device window now appears as shown in Figure 9, then press OK to close the SPI Serial Flash Device window.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Figure 10. Device Information Dialog 12. Check that the LSC ispVM System window appears as it does in Figure 11. Figure 11. ispVM System Interface 13. To begin the download of the bitstream into the SPI Flash, press the GO menu button. You will see a small counter display window start up and then that window will change to a Processing address window.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide LatticeXP2 SRAM Configuration Using SPI Flash and a Lattice ispDOWNLOAD Cable at The LatticeXP2 SRAM can be configured easily via the on board SPI Flash using the JTAG port and ispVM. The LatticeXP2 device is SRAM-based, so it must remain powered on to retain its configuration when programming the SRAM.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Figure 13. Device Information Dialog Figure 14. SPI Serial Flash Device Dialog 8. Select Browse and point to the location of the bitstream file. Note that if you have a “.JED” file output from isp- LEVER, you can convert it to a “.BIT”...
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Figure 15. Select Device Dialog 10. Check that the SPI Serial Flash Device window now appears as shown in Figure 16, then press OK to close the SPI Serial Flash Device window.
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LatticeXP2 Advanced Lattice Semiconductor Evaluation Board User’s Guide Figure 17. Device Information Dialog 12. Check that the LSC ispVM System window appears as it does in Figure 18. Figure 18. ispVM System Interface 13. To begin the download of the bitstream into the SPI Flash, press the GO menu button. You will see a small counter display window start up and then that window will change to a Processing address window.