Omron C200HX Operation Manual
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Omron C200HX Operation Manual

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Table of Contents

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Cat. No. W303-E1-09
Programmable Controllers
C200HX/C200HG/C200HE
OPERATION MANUAL

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Summary of Contents for Omron C200HX

  • Page 1 Cat. No. W303-E1-09 Programmable Controllers C200HX/C200HG/C200HE OPERATION MANUAL...
  • Page 3 C200HX/C200HG/C200HE Programmable Controllers Operation Manual Revised August 2004...
  • Page 4 Buyer indemnifies Omron against all related costs or expenses. rights of another party. 10. Force Majeure. Omron shall not be liable for any delay or failure in delivery 16. Property; Confidentiality. Any intellectual property in the Products is the exclu-...
  • Page 5 OMRON. No patent liability is assumed with respect to the use of the information contained herein. Moreover, because OMRON is constantly striving to improve its high-quality products, the information contained in this manual is subject to change without notice.

  • Page 7: Table Of Contents

    ............OMRON Product Terminology .
  • Page 8 TABLE OF CONTENTS Controlling Bit Status ........... . . Work Bits (Internal Relays) .
  • Page 9 TABLE OF CONTENTS SECTION 8 Serial Communications ......Introduction ............Host Link Communications .
  • Page 11 It also provides an overview of the process of programming and operating a PC and ex- plains basic terminology used with OMRON PCs. Descriptions of Peripheral Devices used with the C200HX/HG/HE PCs and a table of other manuals available to use with this manual for special PC ap- plications are also provided.
  • Page 13 PRECAUTIONS This section provides general precautions for using the Programmable Controller (PC) and related devices. The information contained in this section is important for the safe and reliable application of the PC. You must read this section and understand the information contained before attempting to set up or operate a PC system. 1 Intended Audience .

  • Page 14: Intended Audience

    It is extremely important that a PC and all PC Units be used for the specified purpose and under the specified conditions, especially in applications that can directly or indirectly affect human life. You must consult with your OMRON representative before applying a PC System to the above mentioned applications.

  • Page 15: Operating Environment Precautions

    Application Precautions such problems, external safety measures must be provided to ensure safety in the system. • When the 24-VDC output (service power supply to the PC) is overloaded or short-circuited, the voltage may drop and result in the outputs being turned OFF.
  • Page 16 Application Precautions • Connecting or disconnecting any cables or wiring. Caution Failure to abide by the following precautions could lead to faulty operation of the PC or the system or could damage the PC or PC Units. Always heed these pre- cautions.

  • Page 17: Ec Directives

    EMC-related performance of the OMRON devices that comply with EC Direc- tives will vary depending on the configuration, wiring, and other conditions of the equipment or control panel on which the OMRON devices are installed. The cus- tomer must, therefore, perform the final check to confirm that devices and the overall machine conform to EMC standards.
  • Page 18 EC Directives Countermeasures (Refer to EN61000-6-4 for more details.) Countermeasures are not required if the frequency of load switching for the whole system with the PC included is less than 5 times per minute. Countermeasures are required if the frequency of load switching for the whole system with the PC included is 5 times or more per minute.

  • Page 19: Introduction

    OMRON PCs. Descriptions of peripheral devices used with the C200HX/HG/HE PCs, a table of other manuals available to use with this manual for special PC applications, and a description of the new features of the C200HX/ HG/HE PCs are also provided.

  • Page 20: Overview

    The problem is how to get the desired control signals from available inputs at appropriate times. To achieve proper control, the C200HX/HG/HE PCs use a form of PC logic called ladder-diagram programming. This manual is written to explain ladder-...

  • Page 21: Pc Terminology

    PC operation and are thus explained here. Because the C200HX/HG/HE PCs are Rack PCs, there is no one product that is a C200HX/HG/HE PC. That is why we talk about the configuration of the PC, because a PC is a configuration of smaller Units.

  • Page 22: Omron Product Terminology

    Appendix A Standard Models list products according to these groups. The term Unit is used to refer to all of the OMRON PC products. Although a Unit is any one of the building blocks that goes together to form a C200HX/HG/HE PC, its meaning is generally, but not always, limited in context to refer to the Units that are mounted to a Rack.

  • Page 23: Peripheral Devices

    7. Wire the PC to the controlled system. This step can actually be started as soon as step 3 has been completed. Refer to the C200HX/HG/HE PC Instal- lation Guide and to Operation Manuals and System Manuals for details on individual Units.

  • Page 24: Available Manuals

    PC. The SSS comes on 3.5” disks. A computer running the SSS is connected to the C200HX/HG/HE PC via the Pe- ripheral Port on the CPU Unit using the CQM1-CIF02 or CV500-CIF01 cable.

  • Page 25: C200Hx/Hg/He Features

    W224 Information on Cam Positioner Unit C200HX/HG/HE Features The C200HX/HG/HE CPU Units have a number of new features, but C200H and C200HS programs can be used in the new CPU Units. 1-8-1 C200HS and C200HX/HG/HE Capabilities The following table shows the new capabilities of the C200HX/HG/HE PCs and compares them with those of the C200HS.
  • Page 26 None 10 ms in any mode 1-8-2 Program Compatibility C200HS programs and Memory Cassettes can be used as is in the C200HX/ HG/HE and programs developed for the C200H can be transferred for use in the C200HX/HG/HE very easily. Detailed procedures for the individual steps involved in transferring programs can be found in the SSS Operation Manuals.
  • Page 27 C200HX/HG/HE, allocate UM area for I/O comments. 5. Connect the SSS to the C200HX/HG/HE and go online. 6. Make sure that pin 1 on the C200HX/HG/HE’s CPU Unit is OFF to enable writing to the UM area. 7. Transfer the program and and any other required data to the C200HX/HG/ HE.
  • Page 28 8. To transfer to an EEPROM Memory Cassette, use the following procedure. a) Connect the SSS to the C200HX/HG/HE and go online. b) Make sure that pin 1 on the C200HX/HG/HE’s CPU Unit is OFF to enable writing to the UM area.

  • Page 29: Section 2 Hardware Considerations

    SECTION 2 Hardware Considerations This section provides information on hardware aspects of the C200HX/HG/HE that are relevant to programming and software operation. These include CPU Unit Components, the basic PC configuration, CPU Unit capabilities, and Memory Cassettes. This information is covered in detail in the C200HX/HG/HE Installation Guide.

  • Page 30: Cpu Unit Components

    The PC operates according to the DIP switch settings of the CPU Unit. The DIP switch of the CPU Unit for the C200HX/HG/HE has six pins. For the function of each of the pins, refer to the following table. (All six pins are OFF when the PC is shipped.)

  • Page 31: Cpu Unit Indicators

    A C200H-DAC01 Data Access Console can be connected via the C200H- CN222 or C200H-CN422 Programming Console Connecting Cable, which must be purchased separately. The following operations are not available when the C200H-DAC01 is used with the C200HX/HG/HE: Set value read and change Error message display...
  • Page 32 CPU Unit Components Section 2-1 IBM PC/AT with SSS An IBM PC/AT or compatible computer with SYSMAC Support Software can be connected as shown in the diagram. C200H-LK201-V1 C200HX/HG/HE Mounted directly Host Link Unit RS-232C Peripheral port port Connecting C200H-CN222/422...

  • Page 33: Pc Configuration

    Units, Special I/O Units, and Link Units, which provide the physical I/O terminals corresponding to I/O points. A C200HX/HG/HE CPU Rack can be used alone or it can be connected to other Racks to provide additional I/O points. The CPU Rack provides three, five, eight, or ten slots to which these other Units can be mounted depending on the back- plane used.

  • Page 34: Memory Cassettes

    Memory Cas- sette. An optional Memory Cassette can be used to store the program, PC Set- up, I/O comments, DM area and other data area contents. Refer to the C200HX/ HG/HE Installation Guide for details on installing Memory Cassettes.

  • Page 35: Hardware And Software Settings

    1. Before turning ON the C200HX/HG/HE’s power supply, make sure that switch 1 on the Memory Cassette is set to OFF. 2. Turn ON the C200HX/HG/HE and write the ladder program or read an exist- ing program from a data disk.

  • Page 36: Writing/Reading Iom Data

    Use the following procedure to write IOM data to an EEPROM Memory Cas- Memory Cassette sette. 1, 2, 3... 1. Before turning ON the C200HX/HG/HE’s power supply, make sure that switch 1 on the Memory Cassette is set to OFF.
  • Page 37 Memory Cassettes Section 2-4 2. Turn ON the C200HX/HG/HE and switch it to PROGRAM mode. 3. Use a host computer running SSS or a Programming Console to turn ON SR 27300 (the Save IOM to Cassette Bit). The data will be written from the PC to the Memory Cassette.

  • Page 38: Cpu Unit Dip Switch

    CPU Unit DIP Switch Section 2-5 CPU Unit DIP Switch The 6 pins on the DIP switch control 6 of the CPU Unit’s operating parameters. Item Setting Function Memory protect The UM area cannot be overwritten from a Peripheral Device. The UM area can be overwritten from a Peripheral Device.

  • Page 39: Operating Without A Backup Battery

    Operating without a Backup Battery Section 2-6 Operating without a Backup Battery An EEPROM or EPROM Memory Cassette can be used together with various memory settings to enable operation without a backup battery. The following conditions must be met. 1, 2, 3... 1.
  • Page 40 Operating without a Backup Battery Section 2-6 EPROM Memory Cassette 1, 2, 3... 1. Allocate UM area using the SYSMAC Support Software (SSS) if you want to use Expansion DM for Special I/O Units or if you want to store I/O comments in the PC.

  • Page 41: Section 3 Memory Areas

    SECTION 3 Memory Areas Various types of data are required to achieve effective and correct control. To facilitate managing this data, the PC is provided with various memory areas for data, each of which performs a different function. The areas generally accessible by the user for use in programming are classified as data areas.

  • Page 42: Introduction

    Introduction Section 3-1 Introduction 3-1-1 Data Area Overview Details, including the name, size, and range of each area are summarized in the following table. Data and memory areas are normally referred to by their acro- nyms, e.g., the IR Area, the SR Area, etc. Area Size Range...

  • Page 43: Ir/Sr Area Overview

    Data Area Structure Section 3-2 some flags can be turned ON and OFF by the user, most flags are read only; they cannot be controlled directly. Control bits are bits turned ON and OFF by the user to control specific aspects of operation.
  • Page 44 Data Area Structure Section 3-2 An actual data location within any data area but the TC area is designated by its address. The address designates the bit or word within the area where the de- sired data is located. The TC area consists of TC numbers, each of which is used for a specific timer or counter defined in the program.
  • Page 45 DBS(––), DBSL(––), MBS(––), and MBSL(––)) use signed data exclusively. Unsigned binary Unsigned binary is the standard format used in OMRON PCs. Data in this manu- al are unsigned unless otherwise stated. Unsigned binary values are always positive and range from 0 ($0000) to 65,535 ($FFFF). Eight-digit values range from 0 ($0000 0000) to 4,294,967,295 ($FFFF FFFF).
  • Page 46 Data Area Structure Section 3-2 Signed Binary Signed binary data can have either a positive and negative value. The sign is indicated by the status of bit 15. If bit 15 is OFF, the number is positive and if bit 15 is ON, the number is negative.

  • Page 47: Ir (Internal Relay) Area

    It is accessible both by bit and by word. In the C200HX/HG/HE PC, the IR area is comprised of words IR 000 to IR 235 (IR area 1) and IR 300 to IR 511 (IR area 2). Basic instructions have somewhat long- er execution times when they access IR area 2 rather than IR area 1.
  • Page 48 Group-2 High-density I/O Units, B7A Interface Units, and Auxiliary Power Sup- ply Units. Allocation for Special I/O In most C200HX/HG/HE PCs, up to sixteen Special I/O Units may be mounted in Units and Slave Racks any slot of the CPU Rack or Expansion I/O Racks. (A limited number of Special I/O Units can be installed in Remote I/O Slave Racks, too.) Each Special I/O Unit...
  • Page 49 HG/HE CPU Unit, do not set the unit number on a C500 Slave Rack to 4, be- cause there is no unit number 5. With the C500 Slave Rack, I/O words are allo- cated only to installed Units, from left to right, and not to slots as in the C200HX/ HG/HE Racks.
  • Page 50 Note Unit numbers A to F cannot be set when using the following CPU Units: C200HE-CPU32(-Z), C200HE-CPU42(-Z), C200HG-CPU33(-Z), C200HG- CPU43(-Z), C200HX-CPU34(-Z), and C200HX-CPU44(-Z). Set unit number 0 to 9 when using these CPU Units. When setting I/O numbers on the High-density I/O Units and B7A Interface Units, be sure that the settings will not cause the same words to be allocated to more than one Unit.

  • Page 51: Sr (Special Relay) Area

    SR (Special Relay) Area Section 3-4 SR (Special Relay) Area The SR area contains flags and control bits used for monitoring PC operation, accessing clock pulses, and signalling errors. SR area word addresses range from 236 through 299; bit addresses, from 23600 through 29915. The SR areas is divided into two sections.
  • Page 52 SR (Special Relay) Area Section 3-4 Word(s) Bit(s) Function SEND(90)/RECV(98) Error Flag for operating level 0 of SYSMAC LINK or SYSMAC NET Link System or CMCR(––) Error Flag for PC Card SEND(90)/RECV(98) Enable Flag for operating level 0 of SYSMAC LINK or SYSMAC NET Link System or CMCR(––) Enable Flag for PC Card Operating Level 0 Data Link Operating Flag SEND(90)/RECV(98) Error Flag for operating level 1 of SYSMAC LINK or SYSMAC NET...
  • Page 53 SR (Special Relay) Area Section 3-4 Word(s) Bit(s) Function 0.1-second clock pulse bit 0.2-second clock pulse bit 1.0-second clock pulse bit Instruction Execution Error (ER) Flag These flags are turned OFF when the END(01) instruction is executed, so their status can’t be ’...
  • Page 54 SR (Special Relay) Area Section 3-4 Word(s) Bit(s) Function Save UM to Cassette Bit Data transferred when the Bit is turned ON in PROGRAM mode. Bit will automatically turn OFF. PROGRAM mode. Bit will automatically turn OFF. Load UM from Cassette Bit A non-fatal error will occur if these bits are turned ON in RUN or MONITOR modes.
  • Page 55 SR (Special Relay) Area Section 3-4 Word(s) Bit(s) Function Special I/O Unit #0 Restart Flag These flags will turn ON during restart processing. These flags will not turn ON for Units on Slave ON f Special I/O Unit #1 Restart Flag Racks Racks.

  • Page 56: Sysmac Net/Sysmac Link System

    SR (Special Relay) Area Section 3-4 3-4-1 SYSMAC NET/SYSMAC LINK System Loop Status SR 236 provides the local node loop status for SYSMAC NET Systems, as shown below. Bit in SR 236 Level 0 Level 1 Status/ Central Power Supply Loop Status Reception Status Meaning...

  • Page 57: Remote I/O Systems

    SR (Special Relay) Area Section 3-4 Data Link Status Flags SR 238 to SR 245 contain the data link status for SYSMAC LINK/SYSMAC NET Systems. The data structure depends on the system used to create the data link. SYSMAC LINK Operating Operating level 0...

  • Page 58: Link System Flags And Control Bits

    SR (Special Relay) Area Section 3-4 3-4-3 Link System Flags and Control Bits Use of the following SR bits depends on the configuration of any Link Systems to which your PC belongs. These flags and control bits are used when Link Units, such as PC Link Units, Remote I/O Units, or Host Link Units, are mounted to the PC Racks or to the CPU Unit.

  • Page 59: Forced Status Hold Bit

    SR (Special Relay) Area Section 3-4 Multilevel PC Link Systems Flag type Bit no. SR 247 SR 248 SR 249 SR 250 Run flags Unit #8, Unit #0, Unit #8, Unit #0, level 1 level 1 level 0 level 0 Unit #9, Unit #1, Unit #9,...

  • Page 60: I/O Status Hold Bit

    SR (Special Relay) Area Section 3-4 Maintaining Status during The status of SR 25211 and thus the status of force-set and force-reset bits can Startup be maintained when power is turned OFF and ON by enabling the Forced Status Hold Bit in the PC Setup. If the Forced Status Hold Bit is enabled, the status of SR 25211 will be preserved when power is turned OFF and ON.

  • Page 61: Cycle Time Error Flag

    SR (Special Relay) Area Section 3-4 This bit can be programmed to activate an external warning for a low battery volt- age. The operation of the battery alarm can be disabled in the PC Setup if desired. Refer to 3-6-4 PC Setup for details. 3-4-9 Cycle Time Error Flag SR bit 25309 turns ON if the cycle time exceeds 100 ms.

  • Page 62: Step Flag

    SR (Special Relay) Area Section 3-4 3-4-13 Step Flag SR bit 25407 turns ON for one cycle when step execution is started with the STEP(08) instruction. 3-4-14 Group-2 Error Flag SR bit 25414 turns ON for any of the following errors for Group-2 High-density I/O Units and B7A Interface Units: the same I/O number set twice, the same words allocated to more than one Unit, refresh errors.

  • Page 63: Interrupt Subroutine Areas

    SR (Special Relay) Area Section 3-4 Negative Flag, N SR bit 25402 turns ON when the result of a calculation is negative. Overflow Flag, OF SR bit 25404 turns ON when the result of a binary addition or subtraction ex- ceeds 7FFF or 7FFFFFFF.

  • Page 64: Peripheral Port Communications Areas

    SR (Special Relay) Area Section 3-4 Host Link Level 0 Send SR bit 26705 turns ON when the PC is ready to transmit to the Host Link Unit. Ready Flag Host Link Level 1 Send SR bit 26713 turns ON when the PC is ready to transmit to the Host Link. Ready Flag 3-4-20 Peripheral Port Communications Areas Peripheral Port Error Code...

  • Page 65: Data Transfer Error Bits

    SR (Special Relay) Area Section 3-4 Memory Cassette Flag SR bit 26915 turns ON when a Memory Cassette is mounted. Save UM to Cassette Flag SR bit 27000 turns ON when UM data is read to a Memory Cassette in Program Mode.

  • Page 66: Data Save Flags

    AR (Auxiliary Relay) Area Section 3-5 Memory Error Flag: SR bit 27215 turns ON when an autoboot error occurs. Autoboot Error 3-4-25 Data Save Flags Data transferred to Memory Cassette when Bit is turned ON in PROGRAM mode. Bit will automatically turn OFF. An error will be produced if turned ON in any other mode.
  • Page 67 AR (Auxiliary Relay) Area Section 3-5 uses, such as transmission counters, flags, and control bits, and words AR 00 through AR 07 and AR 23 through AR 27 cannot be used for any other purpose. Words and bits from AR 08 to AR 17 are available as work words and work bits if not used for the following assigned purposes.

  • Page 68: Restarting Special I/O Units

    AR (Auxiliary Relay) Area Section 3-5 Word(s) Bit(s) Function 00 to 07 Hours: 00 to 23 (24-hour system) 08 to 15 Day of Month: 01 to 31 (adjusted by month and for leap year) 00 to 07 Month: 1 to 12 08 to 15 Year: 00 to 99 (Rightmost two digits of year) 00 to 07...

  • Page 69: Slave Rack Error Flags

    AR (Auxiliary Relay) Area Section 3-5 3-5-2 Slave Rack Error Flags AR bits 0200 to AR 0204 correspond to the unit numbers of Remote I/O Slave Units #0 to #4. These flags will turn ON if the same number is allocated to more then one Slave or if a transmission error occurs when starting the System.

  • Page 70: Sysmac Link/Controller Link System Data Link Settings

    AR (Auxiliary Relay) Area Section 3-5 3-5-5 SYSMAC LINK/Controller Link System Data Link Settings AR 0700 to AR 0703 and AR 0704 to AR 0707 are used to designate word alloca- tions for operating levels 0 and 1 of the SYSMAC LINK/Controller Link System. Allocation can be set to occur either according to settings from the SSS or auto- matically in the LR and/or DM areas.

  • Page 71: Sysmac Link/Sysmac Net Link System Service Time

    3-5-9 Calendar/Clock Area and Bits Calendar/Clock Area A clock is built into the C200HX/HG/HE CPU Units. If AR 2114 (Clock Stop Bit) is OFF, then the date, day, and time will be available in BCD in AR 18 to AR 20 and AR 2100 to AR 2108 as shown below.

  • Page 72: Terminal Mode Key Bits

    AR (Auxiliary Relay) Area Section 3-5 3-5-10 TERMINAL Mode Key Bits If the Programming Console is mounted to the PC and is in TERMINAL mode, any inputs on keys 0 through 9 (including characters A through F, i.e., keys 0 through 5 with SHIFT) will turn on a corresponding bit in AR 22.

  • Page 73: Cycle Time Flag

    AR (Auxiliary Relay) Area Section 3-5 3-5-13 Cycle Time Flag AR 2405 turns ON when the cycle time set with SCAN(18) is shorter than the actual cycle time. AR 2405 is refreshed every cycle while the PC is in RUN or MONITOR mode. 3-5-14 Link Unit Mounted Flags The following flags indicate when the specified Link Units are mounted to the Racks.

  • Page 74: Dm (Data Memory) Area

    DM (Data Memory) Area Section 3-6 DM (Data Memory) Area The DM area is divided into various parts as described in the following table. A portion of UM (up to 3,000 words in 1,000-word increments) can be allocated as Expansion DM. Addresses User Usage...

  • Page 75: Expansion Dm Area

    DM (Data Memory) Area Section 3-6 be used as the operand in the instruction, and the content of DM 0324 will be moved to LR 00. Word Content MOV(21) DM 0099 4C59 DM 0100 DM 0100 0324 Indirect Indicates LR 00 DM 0101 F35A address...

  • Page 76: Special I/O Unit Data

    DM (Data Memory) Area Section 3-6 3-6-2 Special I/O Unit Data Special I/O Units are allocated 1000 or 1600 words in the DM Area depending on the value set in word DM 6602 of the PC Setup. The DM 6602 setting determines whether the Special I/O Unit Data area is setup for 10 or 16 Units and whether the data is stored in read/write DM (DM 1000 to DM 2599) or read-only DM (DM 7000 to DM 8599).
  • Page 77 DM (Data Memory) Area Section 3-6 Although each of them contains a different record, the structure of each record is the same: the first word contains the error code; the second and third words, the day and time. The error code will be either one generated by the system or by FAL(06)/FALS(07);...

  • Page 78: Pc Setup

    DM (Data Memory) Area Section 3-6 The Error History Area can be reset by turning ON and then OFF AR 0714 (Error History Reset Bit). When this is done, the Record Pointer will be reset to 0000, the Error History Area will be reset (i.e., cleared), and any further error codes will be recorded from the beginning of the Error History Area.
  • Page 79 DM (Data Memory) Area Section 3-6 Word(s) Bit(s) Function Default DM 6602 00 to 07 Not used. 08 to 15 00: C200H-compatible RAM Mode (Default) DM 1000 to Use DM 1000 through DM 2599 for the initial data area for the Special DM 2599 I/O Unit Area.
  • Page 80 Remote I/O processing, or Special I/O processing is being performed. The interrupt subroutine will be executed after the processing is completed. High-speed Response (C200HS or C200HX/HG/HE) Interrupts will be received when Host Link servicing, execution of a single instruction, Remote I/O processing, or Special I/O processing is being performed.
  • Page 81 DM (Data Memory) Area Section 3-6 Word(s) Bit(s) Function Default DM 6621 00 to 07 Reserved 08 to 15 Special I/O Unit refresh (PC Link Units included) Enable 00: Enable refresh for all Special I/O Units 01: Disable refresh for all Special I/O Units (but, not valid on Slave Racks) A setting of 1 (Disable) is not valid for Special I/O Units mounted in Slave Racks.
  • Page 82 DM (Data Memory) Area Section 3-6 Word(s) Bit(s) Function Default DM 6648 00 to 07 Node number (Host Link) 00 to 31 (BCD) 08 to 11 Start code enable (RS-232C) Disabled 0: Disable; 1: Set 12 to 15 End code enable (RS-232C) Disabled 0: Disable (number of bytes received) 1: Set (specified end code)

  • Page 83: Communications Board Settings

    DM (Data Memory) Area Section 3-6 Word(s) Bit(s) Function Default DM 6654 00 to 07 Start code (RS-232C) 0000 00 to FF (binary) 08 to 15 12 to 15 of DM 6653 set to 0: Number of bytes received 00: Default setting (256 bytes) 01 to FF: 1 to 255 bytes 12 to 15 of DM 6653 set to 1: End code (RS-232C)
  • Page 84 DM (Data Memory) Area Section 3-6 Word(s) Bit(s) Function Default DM 6551 00 to 07 Baud rate 1.2 K 00: 1.2K, 01: 2.4K, 02: 4.8K, 03: 9.6K, 04: 19.2K 08 to 15 Frame format 1 start bit, 7-bit Start Length Stop Parity data, 1 stop bit,...

  • Page 85: Special I/O Unit Area Settings

    DM (Data Memory) Area Section 3-6 Word(s) Bit(s) Function Default DM 6556 00 to 07 Baud rate 1.2 K 00: 1.2K, 01: 2.4K, 02: 4.8K, 03: 9.6K, 04: 19.2K 08 to 15 Frame format 1 start bit, 7-bit Start Length Stop Parity data, 1 stop bit,...

  • Page 86: Holding Relay) Area

    TC (Timer/Counter) Area Section 3-8 Setting Mode Function C200H-compatible The contents of DM 7000 through DM 8599 are transferred to DM 1000 through DM 2599 ROM Mode 2 at startup and DM 1000 through DM 2599 are used for the Special I/O Unit Area. •...

  • Page 87: Lr (Link Relay) Area

    LR (Link Relay) Area Section 3-9 Once defined, a TC number can be designated as an operand in one or more of certain set of instructions other than those listed above. When defined as a timer, a TC number designated as an operand takes a TIM prefix. The TIM prefix is used regardless of the timer instruction that was used to define the timer.

  • Page 88: Um Area

    Section 3-10 3-10 UM Area With the C200HX/HG/HE PCs, the UM area contains the ladder program. Part of the UM area can be allocated for use as expansion DM or the I/O comment area. The usable size of the UM area ranges from 3.2 KW in the C200HE-CPU11-E to 31.2 KW in the C200HX-CPUj4-E.

  • Page 89: Tr (Temporary Relay) Area

    6,144 words each (EM 0000 through EM 6143). The C200HG PCs have one bank (bank 0) and the C200HX PCs have three banks (banks 0, 1, and 2). The effective bank is called the current bank.

  • Page 90: The Current Em Bank

    EM (Extended Data Memory) Area Section 3-12 access words in EM bank 1 and not the DM area. In this case, the second oper- and in the MOV(21) instruction transfers #1234 to a word in the EM bank. (For example, #1234 will be moved to EM 0100 if DM 0000 contains 0100.) Later in the program, the destination for indirect addressing (DM) is switched back to the DM area by executing IEMS(––) with an operand of 000.

  • Page 91: Section 4 Writing And Inputting The Program

    SECTION 4 Writing and Inputting the Program This section explains the basic steps and concepts involved in writing a basic ladder diagram program, inputting the program into memory, and executing it. It introduces the instructions that are used to build the basic structure of the ladder diagram and control its execution.

  • Page 92: Basic Procedure

    Instruction Terminology Section 4-2 Basic Procedure There are several basic steps involved in writing a program. Sheets that can be copied to aid in programming are provided in Appendix F Word Assignment Re- cording Sheets and Appendix G Program Coding Sheet. 1, 2, 3...

  • Page 93: Program Capacity

    Basic Ladder Diagrams Section 4-4 Program Capacity The maximum user program size varies with the amount of UM allocated to ex- pansion DM and the I/O Comment Area. Approximately 10.1 KW are available for the ladder program when 3 KW are allocated to expansion DM and 2 KW are allocated to I/O comments as shown below.

  • Page 94: Basic Terms

    Basic Ladder Diagrams Section 4-4 4-4-1 Basic Terms Normally Open and Each condition in a ladder diagram is either ON or OFF depending on the status Normally Closed of the operand bit that has been assigned to it. A normally open condition is ON if Conditions the operand bit is ON;...

  • Page 95: Ladder Instructions

    Basic Ladder Diagrams Section 4-4 Program Memory addresses start at 00000 and run until the capacity of Program Memory has been exhausted. The first word at each address defines the instruc- tion. Any definers used by the instruction are also contained in the first word. Also, if an instruction requires only a single bit operand (with no definer), the bit operand is also programmed on the same line as the instruction.
  • Page 96 Basic Ladder Diagrams Section 4-4 LOAD and LOAD NOT The first condition that starts any logic block within a ladder diagram corre- sponds to a LOAD or LOAD NOT instruction. Each of these instruction requires one line of mnemonic code. “Instruction” is used as a dummy instruction in the following examples and could be any of the right-hand instructions described lat- er in this manual.
  • Page 97 Basic Ladder Diagrams Section 4-4 OR and OR NOT When two or more conditions lie on separate instruction lines which run in paral- lel and then join together, the first condition corresponds to a LOAD or LOAD NOT instruction; the other conditions correspond to OR or OR NOT instructions. The following example shows three conditions which correspond (in order from the top) to a LOAD NOT, an OR NOT, and an OR instruction.

  • Page 98: Output And Output Not

    Basic Ladder Diagrams Section 4-4 4-4-4 OUTPUT and OUTPUT NOT The simplest way to output the results of combining execution conditions is to output it directly with the OUTPUT and OUTPUT NOT. These instructions are used to control the status of the designated operand bit according to the execu- tion condition.

  • Page 99: Logic Block Instructions

    Basic Ladder Diagrams Section 4-4 Now you have all of the instructions required to write simple input-output pro- grams. Before we finish with ladder diagram basic and go onto inputting the pro- gram into the PC, let’s look at logic block instruction (AND LOAD and OR LOAD), which are sometimes necessary even with simple diagrams.
  • Page 100 Basic Ladder Diagrams Section 4-4 Analyzing the above ladder diagram in terms of mnemonic instructions, the condition for IR 00000 is a LOAD instruction and the condition below it is an OR instruction between the status of IR 00000 and that of IR 00001. The condition at IR 00002 is another LOAD instruction and the condition below is an OR NOT instruction, i.e., an OR between the status of IR 00002 and the inverse of the status of IR 00003.
  • Page 101 Basic Ladder Diagrams Section 4-4 The following diagram requires AND LOAD to be converted to mnemonic code because three pairs of parallel conditions lie in series. The two options for coding the programs are also shown. 00000 00002 00004 00500 00001 00003 00005...
  • Page 102 Basic Ladder Diagrams Section 4-4 Combining AND LOAD and Both of the coding methods described above can also be used when using AND OR LOAD LOAD and OR LOAD, as long as the number of blocks being combined does not exceed eight.
  • Page 103 Basic Ladder Diagrams Section 4-4 Complicated Diagrams When determining what logic block instructions will be required to code a dia- gram, it is sometimes necessary to break the diagram into large blocks and then continue breaking the large blocks down until logic blocks that can be coded without logic block instructions have been formed.
  • Page 104 Basic Ladder Diagrams Section 4-4 The following diagram requires an OR LOAD followed by an AND LOAD to code the top of the three blocks, and then two more OR LOADs to complete the mne- monic code. 00000 00001 Address Instruction Operands LR 0000...
  • Page 105 Basic Ladder Diagrams Section 4-4 Again, this diagram can be redrawn as follows to simplify program structure and coding and to save memory space. Address Instruction Operands 00006 00007 00003 00004 00000 00000 00006 LR 0000 00001 00007 00005 00002 00005 00001 00002...

  • Page 106: Coding Multiple Right-Hand Instructions

    The Programming Console Section 4-5 4-4-7 Coding Multiple Right-hand Instructions If there is more than one right-hand instruction executed with the same execu- tion condition, they are coded consecutively following the last condition on the instruction line. In the following example, the last instruction line contains one more condition that corresponds to an AND with IR 00004.
  • Page 107 The Programming Console Section 4-5 Yellow: Operation Keys The yellow keys are used for writing and correcting programs. Detailed explana- tions of their functions are given later in this section. Gray: Instruction and Data Except for the SHIFT key on the upper right, the gray keys are used to input Area Keys instructions and designate data area prefixes when inputting or changing a pro- gram.
  • Page 108 The Programming Console Section 4-5 The gray keys other than the SHIFT key have either the mnemonic name of the instruction or the abbreviation of the data area written on them. The functions of these keys are described below. Pressed before the function code when inputting an instruction via its function code.

  • Page 109: Pc Modes

    Preparation for Operation Section 4-6 4-5-2 PC Modes The Programming Console is equipped with a switch to control the PC mode. To select one of the three operating modes—RUN, MONITOR, or PROGRAM— use the mode switch. The mode that you select will determine PC operation as well as the procedures that are possible from the Programming Console.

  • Page 110: Entering The Password

    Preparation for Operation Section 4-6 4. Confirm that the CPU Unit’s POWER LED is lit and the following display ap- pears on the Programming Console screen. (If the PC mode is not dis- played, turn OFF and restart the power supply. If the ALM/ERR LED is lit or flashing or an error message is displayed, clear the error that has occurred.) <PROGRAM>...

  • Page 111: Clearing Memory

    Preparation for Operation Section 4-6 4-6-3 Clearing Memory Using the Memory Clear operation it is possible to clear all or part of the UM area (RAM or EEPROM), and the IR, HR, AR, DM, EM and TC areas. Unless other- wise specified, the clear operation will clear all of the above memory areas.
  • Page 112 Preparation for Operation Section 4-6 The following procedure is used to clear memory completely. MEMORY ERR Continue pressing I/O VER ERR the CLR key once for each error message until “00000” appears on the display 00000 00000 00000MEMORY CLR? HR CNT DM EM~ All clear 00000MEM ALLCLR? 00000MEM ALLCLR...
  • Page 113 Preparation for Operation Section 4-6 To leave the TC area uncleared and retain Program Memory addresses 00000 through 00122, input as follows: 00000 00000 00000 00000MEMORY CLR? HR CNT DM EM~ 00000MEMORY CLR? DM EM~ 00123MEMORY CLR? DM EM~ 00000MEMORY CLR END HR DM EM Clearing Selected EM Banks When a partial memory clear operation is being performed, specific banks can...

  • Page 114: Registering The I/O Table

    PC and the Rack locations of the I/O Units. It also clears all I/O bits. It is not absolutely necessary to register the I/O table with the C200HX/HG/HE. When the I/O table has not been registered, the PC will operate according to the I/O Units mounted when power is applied.

  • Page 115: Clearing Error Messages

    Preparation for Operation Section 4-6 Initial I/O Table Registration 00000 00000 FUN (??) 00000IOTBL ? ?U= Register I/O table 00000IOTBL WRIT ???? 00000IOTBL WRIT 9713 00000IOTBL WRIT 4-6-5 Clearing Error Messages After the I/O table has been registered, any error messages recorded in memory should be cleared.
  • Page 116 I/O slot number Rack number Meaning of Displays The following display indicates a C500, C1000H, or C2000H and C200H, C200HS, or C200HX/HG/HE have the same unit number on a Remote I/O Slave Rack. 00000I/OTBL CHK * *U= The following display indicates a duplication in Optical I/O Unit unit numbers.

  • Page 117: Reading The I/O Table

    Preparation for Operation Section 4-6 4-6-7 Reading the I/O Table The I/O Table Read operation is used to access the I/O table that is currently registered in the CPU Unit memory. This operation can be performed in any PC mode. Key Sequence [0 to 3] [0 to 9]...
  • Page 118 Preparation for Operation Section 4-6 Meaning of Displays I/O Unit Designations for Displays (see I/O Units Mounted in Remote Slave Racks, page 101) C500, 1000H/C2000H I/O Units No. of points Input Unit Output Unit O * * * I * * * I I * * O O * * I I I I...

  • Page 119: Clearing The I/O Table

    Preparation for Operation Section 4-6 Remote I/O Slave Racks 00000IOTBL READ R** *U=**** I/O word number I/O type: I, O i, o (see tables on previous page) Unit number (0 to 9) Remote I/O Slave Unit number (0 to 4) Remote I/O Master Unit number (0 or 1) Indicates a Remote I/O Rack Group-2 HIgh-density I/O...

  • Page 120: Sysmac Net Link Table Transfer

    Preparation for Operation Section 4-6 Key Sequence Example 00000 00000 FUN (??) 00000IOTBL ? ?U= 00000IOTBL WRIT ???? 00000IOTBL CANC ???? 00000IOTBL CANC 9713 00000IOTBL CANC 4-6-9 SYSMAC NET Link Table Transfer The SYSMAC NET Link Table Transfer operation transfers a copy of the SYS- MAC NET Link Data Link table to the UM Area program memory.
  • Page 121 Preparation for Operation Section 4-6 Key Sequence Example 00000 00000 FUN(??) 00000LINK TBL~UM (SYSMAC NET)???? 00000LINK TBL~UM (SYSMAC NET)9713 00000LINK TBL~UM The following indicates that the I/O table cannot be transferred. 00000LINK TBL~UM DISABLED...

  • Page 122: Inputting, Modifying, And Checking The Program

    Inputting, Modifying, and Checking the Program Section 4-7 Inputting, Modifying, and Checking the Program Once a program is written in mnemonic code, it can be input directly into the PC from a Programming Console. Mnemonic code is keyed into Program Memory addresses from the Programming Console.

  • Page 123: Entering And Editing Programs

    Inputting, Modifying, and Checking the Program Section 4-7 Example If the following mnemonic code has already been input into Program Memory, the key inputs below would produce the displays shown. 00000 Address Instruction Operands 00200 00000 00201 00001 00200 00202 0123 00203 00100...
  • Page 124 Inputting, Modifying, and Checking the Program Section 4-7 Inputting SV for Counters The SV (set value) for a timer or counter is generally entered as a constant, and Timers although inputting the address of a word that holds the SV is also possible. When inputting an SV as a constant, CONT/# is not required;...
  • Page 125 Inputting, Modifying, and Checking the Program Section 4-7 Example The following program can be entered using the key inputs shown below. Dis- plays will appear as indicated. 00000 Address Instruction Operands 00200 00002 00201 00200 0123 00202 TIMH(15) 0500 00200 00002 00201READ NOP (00)

  • Page 126: Checking The Program

    Inputting, Modifying, and Checking the Program Section 4-7 Error Messages The following error messages may appear when inputting a program. Correct the error as indicated and continue with the input operation. The asterisks in the displays shown below will be replaced with numeric data, normally an address, in the actual display.
  • Page 127 Inputting, Modifying, and Checking the Program Section 4-7 Many of the following errors are for instructions that have not yet been described yet. Refer to 4-8 Controlling Bit Status or to Section 5 Instruction Set for details on these. Type Message Meaning and appropriate response ?????

  • Page 128: Displaying The Cycle Time

    Inputting, Modifying, and Checking the Program Section 4-7 Example The following example shows some of the displays that can appear as a result of a program check. 00000 00000PROG CHK CHKLVL (0 2)? 00064PROG CHK Display #1 Halts program check 00699CHK ABORTD Display #2 Check continues until END(01)

  • Page 129: Program Searches

    Inputting, Modifying, and Checking the Program Section 4-7 4-7-5 Program Searches The program can be searched for occurrences of any designated instruction or data area address used in an instruction. Searches can be performed from any currently displayed address or from a cleared display. To designate a bit address, press SHIFT, press CONT/#, then input the address, including any data area designation required, and press SRCH.

  • Page 130: Inserting And Deleting Instructions

    Inputting, Modifying, and Checking the Program Section 4-7 Example: 00000 Instruction Search 00000 00000 00200SRCH 00000 00202SRCH 00000 02000SRCH END (01)(02.7KW) 00000 00100 00100 00203SRCH 00203 TIM DATA #0123 Example: 00000 Bit Search 00000CNT CONT 00005 00200CONT SRCH 00005 00203CONT SRCH 00005 02000 END (01)(02.7K)
  • Page 131 Inputting, Modifying, and Checking the Program Section 4-7 To delete an instruction, display the instruction word of the instruction to be deleted and then press DEL and the up key. All the words for the designated instruction will be deleted. Caution Be careful not to inadvertently delete instructions;...
  • Page 132 Inputting, Modifying, and Checking the Program Section 4-7 Inserting an Instruction 00000 Find the address 00000 prior to the inser- 00000 tion point 00000 00201 Program After Insertion Address Instruction Operands 00207SRCH 00000 00100 00201 00001 00101 00002 00201 00206READ 00003 AND NOT 00102...

  • Page 133: Branching Instruction Lines

    Inputting, Modifying, and Checking the Program Section 4-7 4-7-7 Branching Instruction Lines When an instruction line branches into two or more lines, it is sometimes neces- sary to use either interlocks or TR bits to maintain the execution condition that existed at a branching point.
  • Page 134 Inputting, Modifying, and Checking the Program Section 4-7 The previous diagram B can be written as shown below to ensure correct execu- tion. In mnemonic code, the execution condition is stored at the branching point using the TR bit as the operand of the OUTPUT instruction. This execution condition is then restored after executing the right-hand instruction by using the same TR bit as the operand of a LOAD instruction TR 0...
  • Page 135 Inputting, Modifying, and Checking the Program Section 4-7 When drawing a ladder diagram, be careful not to use TR bits unless necessary. Often the number of instructions required for a program can be reduced and ease of understanding a program increased by redrawing a diagram that would otherwise required TR bits.
  • Page 136 Inputting, Modifying, and Checking the Program Section 4-7 When an INTERLOCK instruction is placed before a section of a ladder pro- gram, the execution condition for the INTERLOCK instruction will control the execution of all instruction up to the next INTERLOCK CLEAR instruction. If the execution condition for the INTERLOCK instruction is OFF, all right-hand instructions through the next INTERLOCK CLEAR instruction will be executed with OFF execution conditions to reset the entire section of the ladder diagram.

  • Page 137: Jumps

    Inputting, Modifying, and Checking the Program Section 4-7 If IR 00000 in the above diagram is OFF (i.e., if the execution condition for the first INTERLOCK instruction is OFF), instructions 1 through 4 would be executed with OFF execution conditions and execution would move to the instruction following the INTERLOCK CLEAR instruction.

  • Page 138: Controlling Bit Status

    Controlling Bit Status Section 4-8 The other type of jump is created with a jump number of 00. As many jumps as desired can be created using jump number 00 and JUMP instructions using 00 can be used consecutively without a JUMP END using 00 between them. It is even possible for all JUMP 00 instructions to move program execution to the same JUMP END 00, i.e., only one JUMP END 00 instruction is required for all JUMP 00 instruction in the program.

  • Page 139: Differentiate Up And Differentiate Down

    Controlling Bit Status Section 4-8 4-8-1 DIFFERENTIATE UP and DIFFERENTIATE DOWN DIFFERENTIATE UP and DIFFERENTIATE DOWN instructions are used to turn the operand bit ON for one cycle at a time. The DIFFERENTIATE UP instruction turns ON the operand bit for one cycle after the execution condition for it goes from OFF to ON;...

  • Page 140: Work Bits (Internal Relays)

    Work Bits (Internal Relays) Section 4-9 To create a self-maintaining bit, the operand bit of an OUTPUT instruction is used as a condition for the same OUTPUT instruction in an OR setup so that the operand bit of the OUTPUT instruction will remain ON or OFF until changes occur in other bits.
  • Page 141 Work Bits (Internal Relays) Section 4-9 Reducing Complex Work bits can be used to simplify programming when a certain combination of Conditions conditions is repeatedly used in combination with other conditions. In the follow- ing example, IR 00000, IR 00001, IR 00002, and IR 00003 are combined in a logic block that stores the resulting execution condition as the status of IR 24600.

  • Page 142: Programming Precautions

    Programming Precautions Section 4-10 This action is easily programmed by using IR 22500 as a work bit as the operand of the DIFFERENTIATE UP instruction (DIFU(13)). When IR 00000 turns ON, IR 22500 will be turned ON for one cycle and then be turned OFF the next cycle by DIFU(13).
  • Page 143 Programming Precautions Section 4-10 Except for instructions for which conditions are not allowed (e.g., INTERLOCK CLEAR and JUMP END, see below), every instruction line must also have at least one condition on it to determine the execution condition for the instruction at the right.

  • Page 144: Program Execution

    Special I/O Unit Interface Programs Section 4-12 4-11 Program Execution When program execution is started, the CPU Unit cycles the program from top to bottom, checking all conditions and executing all instructions accordingly as it moves down the bus bar. It is important that instructions be placed in the proper order so that, for example, the desired data is moved to a word before that word is used as the operand for an instruction.

  • Page 145: Special I/O Unit Error Processing Program

    JME(05) 00 4-12-3 Changing the Special I/O Unit Settings In the C200HX/HG/HE, ladder instructions can be used to write data into the Special I/O Unit Areas (DM 1000 to DM 2599) and change the Special I/O Unit settings. Changing the settings is useful when different settings are required for different production processes.

  • Page 146: Special I/O Unit I/O Refreshing Interval

    Special I/O Unit Interface Programs Section 4-12 5. Perform the Expansion Instruction Function Code Assignment operation to assign a function code to XDMR(––). 6. Input the program. Example Program The following program changes the Special I/O Unit Area settings for Unit 2, (Special I/O Unit 2) restarts the Unit, and disables calculations using data from Unit 2 while the Unit is initializing.

  • Page 147: Reducing The Cycle Time

    Section 4-12 4-12-5 Reducing the Cycle Time When a Special I/O Unit is mounted in a C200HX/HG/HE PC, END refreshing is performed automatically each cycle without making any special settings. When several Special I/O Units are being used, the cycle time might become too long because of the time required for this automatic I/O refreshing.

  • Page 148: Analog Timer Unit Programming

    Analog Timer Unit Programming Section 4-13 The following program example is relevant for Special I/O Units mounted to the CPU Rack or Expansion I/O Racks only, because END refreshing is always per- formed on Special I/O Units mounted to Slave Racks regardless of the PC Setup settings.

  • Page 149: Bit Allocation And Dip Switch Settings

    Analog Timer Unit Programming Section 4-13 Refer to the Analog Timer Unit’s Operation Manual for details on switching between internal and external timer SV settings, connecting a variable resistor, and switch settings. Timer Start Input Timer Set Bits (Bits 00 to 03 of n) Bits 08 to 11 of n Time-up...

  • Page 150: Example Program

    Analog Timer Unit Programming Section 4-13 4-13-3 Example Program Unit Configuration The following table shows the word allocations for the Units in this example. Item Word IR word allocated to the Analog Timer Unit IR 002 IR word allocated to the Input Unit IR 000 IR word allocated to the Output Unit IR 005...
  • Page 151 Analog Timer Unit Programming Section 4-13 Unit Settings and Wiring The following diagram shows the switch settings and wiring connections required to achieve the Unit configuration shown above. The settings on these two variable resistor controls are valid because timers 0 and 1 are set for internal SV settings. Use the screwdriver included with the Unit to set the variable resistor.
  • Page 152 Analog Timer Unit Programming Section 4-13 Ladder Program The following diagram shows the example ladder program. 1, 2, 3... 1. Output IR 00500 will go ON about 0.6 s (T0) after input IR 00002 goes ON. 2. Output IR 00501 will go ON about 3 s (T1) after input IR 00003 goes ON. 3.

  • Page 153: Section 5 Instruction Set

    The C200HX/HG/HS PCs can process more than 100 instructions that require function codes, but only 100 function codes (00 to 99) are available. Some instructions, called expansion instructions, do not have fixed function codes and must be assigned function codes from the 18 function codes set aside for expansion instructions before they can be used.
  • Page 154 5-16 Data Movement ..............5-16-1 MOVE –...
  • Page 155 5-21 Special Math Instructions ............5-21-1 FIND MAXIMUM –...

  • Page 156: Notation

    Data Areas, Definer Values, and Flags Section 5-3 Notation In the remainder of this manual, all instructions will be referred to by their mne- monics. For example, the Output instruction will be called OUT; the AND Load instruction, AND LD. If you’re not sure of the instruction a mnemonic is used for, refer to Appendix B Programming Instructions.
  • Page 157 Data Areas, Definer Values, and Flags Section 5-3 Caution The IR and SR areas are considered as separate data areas. If an operand has access to one area, it doesn’t necessarily mean that the same operand will have access to the other area. The border between the IR and SR areas can, howev- er, be crossed for a single operand, i.e., the last bit in the IR area may be speci- fied for an operand that requires more than one word as long as the SR area is also allowed for that operand.

  • Page 158: Differentiated Instructions

    Refer to 5-10 INTERLOCK and INTERLOCK CLEAR – IL(02) and IL(03) for the effects of interlocks on differentiated instructions. The C200HX/HG/HE PCs also provide differentiation instructions: DIFU(13) and DIFD(14). DIFU(13) operates the same as a differentiated instruction, but is used to turn ON a bit for one cycle. DIFD(14) also turns ON a bit for one cycle, but does it when the execution condition has changed from ON to OFF.

  • Page 159: Expansion Instructions

    Expansion Instructions Section 5-5 Expansion Instructions The C200HX/HG/HE PCs have more instructions that require function codes (121) than function codes (100), so some instructions do not have fixed function codes. These instructions, called expansion instructions, are listed in the follow- ing table.

  • Page 160: Coding Right-Hand Instructions

    Coding Right-hand Instructions Section 5-6 Code Mnemonic Name Page (@)MIN FIND MINIMUM MATRIX INPUT (@)NEG 2’S COMPLEMENT (@)NEGL DOUBLE 2’S COMPLEMENT PID CONTROL (@)PMCR PROTOCOL MACRO (@)RXD RECEIVE (@)SBBL DOUBLE BINARY SUBTRACT (@)SCL SCALING (@)SRCH DATA SEARCH (@)STUP CHANGE RS-232C SETUP (@)SUM SUM CALCULATE (@)TKY...
  • Page 161 Coding Right-hand Instructions Section 5-6 The following diagram and corresponding mnemonic code illustrates the points described above. Address Instruction Data 00000 00001 DIFU(13) 22500 00000 00000 00002 00001 00001 00002 00002 00003 DIFU(13) 22500 00100 00200 22500 BCNT(67) 00004 00100 01001 01002 LR 6300 #0001...
  • Page 162 Coding Right-hand Instructions Section 5-6 Multiple Instruction Lines If a right-hand instruction requires multiple instruction lines (such as KEEP(11)), all of the lines for the instruction are entered before the right-hand instruction. Each of the lines for the instruction is coded, starting with LD or LD NOT, to form ‘logic blocks’...

  • Page 163: Instruction Set Lists

    Section 5-7 Instruction Set Lists This section provides tables of the instructions available in the C200HX/HG/HE. The first table can be used to find instructions by function code. The second table can be used to find instruction by mnemonic. In both tables, the @ symbol indi- cates instructions with differentiated variations.
  • Page 164 Instruction Set Lists Section 5-7 Mnemonic Code Words Name Page ASFT(@) ASYNCHRONOUS SHIFT REGISTER ASL (@) ARITHMETIC SHIFT LEFT ASR (@) ARITHMETIC SHIFT RIGHT AVG (@) –– AVERAGE VALUE BCD (@) BINARY TO BCD BCDL (@) DOUBLE BINARY-TO-DOUBLE BCD BCMP (@) BLOCK COMPARE BCNT (@) BIT COUNTER...
  • Page 165 Instruction Set Lists Section 5-7 Mnemonic Code Words Name Page IORD (@) –– SPECIAL I/O UNIT READ IORF (@) I/O REFRESH IOWR (@) –– SPECIAL I/O UNIT WRITE JUMP END JUMP KEEP KEEP None LOAD LD NOT None LOAD NOT LINE (@) COLUMN TO LINE LMSG (@)
  • Page 166 Instruction Set Lists Section 5-7 Mnemonic Code Words Name Page SCAN (@) CYCLE TIME SCL (@) –– SCALING SDEC (@) 7-SEGMENT DECODER SEC (@) HOURS TO SECONDS SEND (@) NETWORK SEND None SHIFT REGISTER SFTR (@) REVERSIBLE SHIFT REGISTER SLD (@) ONE DIGIT SHIFT LEFT SNXT STEP START...

  • Page 167: Ladder Diagram Instructions

    Ladder Diagram Instructions Section 5-8 Ladder Diagram Instructions Ladder Diagram instructions include Ladder instructions and Logic Block instructions and correspond to the conditions on the ladder diagram. Logic block instructions are used to relate more complex parts. 5-8-1 LOAD, LOAD NOT, AND, AND NOT, OR, and OR NOT Ladder Symbols Operand Data Areas B: Bit...

  • Page 168: And Load And Or Load

    Bit Control Instructions Section 5-9 5-8-2 AND LOAD and OR LOAD AND LOAD – AND LD 00000 00002 Ladder Symbol 00001 00003 OR LOAD – OR LD 00000 00001 Ladder Symbol 00002 00003 Description When instructions are combined into blocks that cannot be logically combined using only OR and AND operations, AND LD and OR LD are used.

  • Page 169: Differentiate Up And Down - Difu(13) And Difd

    Bit Control Instructions Section 5-9 OUT turns ON the designated bit for an ON execution condition, and turns OFF the designated bit for an OFF execution condition. With a TR bit, OUT appears at a branching point rather than at the end of an instruction line. Refer to 4-7-7 Branching Instruction Lines for details.
  • Page 170 Bit Control Instructions Section 5-9 Precautions DIFU(13) and DIFD(14) operation can be uncertain when the instructions are programmed between IL and ILC, between JMP and JME, or in subroutines. Re- fer to 5-10 INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03), 5-11 JUMP and JUMP END –...

  • Page 171: Set And Reset - Set And Rset

    Bit Control Instructions Section 5-9 5-9-3 SET and RESET – SET and RSET Ladder Symbols Operand Data Areas B: Bit SET B IR, SR, AR, HR, LR B: Bit RSET B IR, SR, AR, HR, LR Description SET turns the operand bit ON when the execution condition is ON, and does not affect the status of the operand bit when the execution condition is OFF.

  • Page 172: Keep - Keep(11)

    Bit Control Instructions Section 5-9 5-9-4 KEEP – KEEP(11) Ladder Symbol Operand Data Areas B: Bit KEEP(11) IR, AR, HR, LR Limitations Any output bit can generally be used in only one instruction that controls its sta- tus. Refer to 3-3 IR Area for details. Description KEEP(11) is used to maintain the status of the designated bit based on two execution conditions.

  • Page 173: Interlock And Interlock Clear - Il(02) And Ilc

    INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03) Section 5-10 the input device) can cause the designated bit of KEEP(11) to be reset. This situ- ation is shown below. Input Unit KEEP(11) NEVER Bits used in KEEP are not reset in interlocks. Refer to the 5-10 INTERLOCK – and INTERLOCK CLEAR IL(02) and ILC(03) for details.
  • Page 174 INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03) Section 5-10 Instruction Treatment OUT and OUT NOT Designated bit turned OFF. SET and RSET Bit status maintained. TIM and TIMH(15) Reset. TTIM(87) PV maintained. CNT, CNTR(12) PV maintained. KEEP(11) Bit status maintained. DIFU(13) and DIFD(14) Not executed (see the following DIFU(13) and DIFD(14) in Interlocks).

  • Page 175: Jump And Jump End - Jmp(04) And Jme(05)

    JUMP and JUMP END – JMP(04) and JME(05) Section 5-11 Example The following diagram shows IL(02) being used twice with one ILC(03). Address Instruction Operands 00000 IL(02) 00000 00000 00001 00001 IL(02) TIM 511 TIM 511 00002 00001 #0015 001.5 s 00003 00002 0015...

  • Page 176: End - End(01)

    Timer and Counter Instructions Section 5-14 If the jump number for JMP(04) is 00, the CPU Unit will look for the next JME(05) with a jump number of 00. To do so, it must search through the program, causing a longer cycle time (when the execution condition is OFF) than for other jumps. The status of timers, counters, bits used in OUT, bits used in OUT NOT, and all other status controlled by the instructions between JMP(04) 00 and JMP(05) 00 will not be changed.

  • Page 177: Timer - Tim

    Timer and Counter Instructions Section 5-14 Any one TC number cannot be defined twice, i.e., once it has been used as the definer in any of the timer or counter instructions, it cannot be used again. Once defined, TC numbers can be used as many times as required as operands in instructions other than timer and counter instructions.
  • Page 178 Timer and Counter Instructions Section 5-14 If the execution condition remains ON long enough for TIM to time down to zero, the Completion Flag for the TC number used will turn ON and will remain ON until TIM is reset (i.e., until its execution condition is goes OFF). The following figure illustrates the relationship between the execution condition for TIM and the Completion Flag assigned to it.
  • Page 179 Timer and Counter Instructions Section 5-14 ON. When the SV in 005 has expired, 00201 is turned OFF. This bit will also be turned OFF when TIM 001 is reset, regardless of whether or not SV has expired. 00000 Address Instruction Operands TIM 000 00000...
  • Page 180 Timer and Counter Instructions Section 5-14 002; 00000 in an inverse condition is necessary to reset TIM 002 when 00000 goes ON and 00500 is necessary to activate TIM 002 (when 00000 is OFF). 00000 Address Instruction Operands TIM 001 00000 00000 005.0 s...
  • Page 181 Timer and Counter Instructions Section 5-14 The following one-shot timer may be used to save memory. 00000 Address Instruction Operands TIM 001 00000 00000 #0015 001.5 s 00001 00100 00002 00100 TIM 001 00100 0015 00003 AND NOT 00004 00100 Example 5: Bits can be programmed to turn ON and OFF at regular intervals while a desig- Flicker Bits...

  • Page 182: High-Speed Timer - Timh(15)

    Timer and Counter Instructions Section 5-14 5-14-2 HIGH-SPEED TIMER – TIMH(15) Definer Values N: TC number Ladder Symbol # (000 through 511, although 000 through 015 TIMH(15) N preferred) Operand Data Areas SV: Set value (word, BCD) IR, AR, DM, HR, LR, # Limitations SV is between 00.00 and 99.99.

  • Page 183: Totalizing Timer - Ttim(87)

    Timer and Counter Instructions Section 5-14 5-14-3 TOTALIZING TIMER – TTIM(87) Definer Values Ladder Symbol N: TC number # (000 through 511) TTIM(87) Operand Data Areas SV: Set value (word, BCD) IR, AR, DM, HR, LR RB: Reset bit IR, SR, AR, HR, LR Limitations SV is between 0000 and 9999 (000.0 and 999.9 s) and must be in BCD.

  • Page 184: Counter - Cnt

    Timer and Counter Instructions Section 5-14 Example The following figure illustrates the relationship between the execution conditions for a totalizing timer with a set value of 2 s, its PV, and the Completion Flag. 00000 Address Instruction Operands TTIM(87) 00000 00000 TIM 000 00001...
  • Page 185 Timer and Counter Instructions Section 5-14 Changes in execution conditions, the Completion Flag, and the PV are illus- trated below. PV line height is meant only to indicate changes in the PV. Execution condition on count pulse (CP) Execution condition on reset (R) Completion Flag 0002...
  • Page 186 Timer and Counter Instructions Section 5-14 The previously-shown CNT can be modified to restart from SV each time power is turned ON to the PC. This is done by using the First Cycle Flag in the SR area (25315) to reset CNT as shown below. 00000 00001 Address Instruction...

  • Page 187: Reversible Counter - Cntr(12)

    Timer and Counter Instructions Section 5-14 tween when the Completion Flag for TIM 001 goes ON and TIM 001 is reset by its Completion Flag). TIM 001 is also reset by the Completion Flag for CNT 002 so that the extended timer would not start again until CNT 002 was reset by 00001, which serves as the reset for the entire extended timer.
  • Page 188 Timer and Counter Instructions Section 5-14 Limitations Each TC number can be used as the definer in only one TIMER or COUNTER instruction. Description The CNTR(12) is a reversible, up/down circular counter, i.e., it is used to count between zero and SV according to changes in two execution conditions, those in the increment input (II) and those in the decrement input (DI).

  • Page 189: Data Shifting

    Data Shifting Section 5-15 5-15 Data Shifting All of the instructions described in this section are used to shift data, but in differ- ing amounts and directions. The first shift instruction, SFT(10), shifts an execu- tion condition into a shift register; the rest of the instructions shift data that is al- ready in memory.
  • Page 190 Data Shifting Section 5-15 Example 1: The following example uses the 1-second clock pulse bit (25502) so that the Basic Application execution condition produced by 00005 is shifted into a 3-word register between IR 010 and IR 012 every second. 00005 Address Instruction Operands...

  • Page 191: Reversible Shift Register - Sftr(84)

    Data Shifting Section 5-15 The program is set up so that a rotary encoder (00000) controls execution of SFT(10) through a DIFU(13), the rotary encoder is set up to turn ON and OFF each time a product passes the first sensor. Another sensor (00002) is used to detect faulty products in the shoot so that the pusher output and HR 0003 of the shift register can be reset as required.
  • Page 192 Data Shifting Section 5-15 Description SFTR(84) is used to create a single- or multiple-word shift register that can shift data to either the right or the left. To create a single-word register, designate the same word for St and E. The control word provides the shift direction, the status to be put into the register, the shift pulse, and the reset input.

  • Page 193: Arithmetic Shift Left - Asl(25)

    Data Shifting Section 5-15 5-15-3 ARITHMETIC SHIFT LEFT – ASL(25) Ladder Symbols Operand Data Areas Wd: Shift word ASL(25) @ASL(25) IR, SR, AR, DM, HR, LR Description When the execution condition is OFF, ASL(25) is not executed. When the execu- tion condition is ON, ASL(25) shifts a 0 into bit 00 of Wd, shifts the bits of Wd one bit to the left, and shifts the status of bit 15 into CY.

  • Page 194: Rotate Left - Rol(27)

    Data Shifting Section 5-15 5-15-5 ROTATE LEFT – ROL(27) Ladder Symbols Operand Data Areas Wd: Rotate word ROL(27) @ROL(27) IR, SR, AR, DM, HR, LR Description When the execution condition is OFF, ROL(27) is not executed. When the execution condition is ON, ROL(27) shifts all Wd bits one bit to the left, shifting CY into bit 00 of Wd and shifting bit 15 of Wd into CY.

  • Page 195: One Digit Shift Left - Sld(74)

    Data Shifting Section 5-15 5-15-7 ONE DIGIT SHIFT LEFT – SLD(74) Ladder Symbols Operand Data Areas St: Starting word SLD(74) @SLD(74) IR, SR, AR, DM, HR, LR E: End word IR, SR, AR, DM, HR, LR Limitations St and E must be in the same data area, and St must be less than or equal to E. Description When the execution condition is OFF, SLD(74) is not executed.

  • Page 196: Word Shift - Wsft(16)

    Data Shifting Section 5-15 Precautions If a power failure occurs during a shift operation across more than 50 words, the shift operation might not be completed. Set the range between E and St to a maximum of 50 words. Flags The St and E words are in different areas, or St is less than E.
  • Page 197 Data Shifting Section 5-15 Description When the execution condition is OFF, ASFT(17) does nothing and the program moves to the next instruction. When the execution condition is ON, ASFT(17) is used to create and control a reversible asynchronous word shift register be- tween St and E.

  • Page 198: Data Movement

    Data Movement Section 5-16 5-16 Data Movement This section describes the instructions used for moving data between different addresses in data areas. These movements can be programmed to be within the same data area or between different data areas. Data movement is essential for utilizing all of the data areas of the PC.

  • Page 199: Block Set - Bset(71)

    Data Movement Section 5-16 Precautions TC numbers cannot be designated as D to change the PV of the timer or counter. However, these can be easily changed using BSET(71). Indirectly addressed DM word is non-existent. (Content of DM word is Flags not BCD, or the DM area boundary has been exceeded.) ON when all zeros are transferred to D.

  • Page 200: Block Transfer - Xfer(70)

    Data Movement Section 5-16 Example The following example shows how to use BSET(71) to change the PV of a timer depending on the status of IR 00003 and IR 00004. When IR 00003 is ON, TIM 010 will operate as a 50-second timer; when IR 00004 is ON, TIM 010 will oper- ate as a 30-second timer.

  • Page 201: Data Exchange - Xchg(73)

    Data Movement Section 5-16 Flags N is not BCD between 0000 and 2000. S and S+N or D and D+N are not in the same data area. Indirectly addressed DM word is non-existent. (Content of DM word is not BCD, or the DM area boundary has been exceeded.) 5-16-5 DATA EXCHANGE –...
  • Page 202 Data Movement Section 5-16 Stack Operation When the execution condition is OFF, DIST(80) is not executed. When the (C=9000 to 9999) execution condition is ON, DIST(80) operates a stack from DBs to DBs+C–9000. DBs is the stack pointer, so S is copied to the word indicated by DBs and DBs is incremented by 1.

  • Page 203: Data Collect - Coll(81)

    Data Movement Section 5-16 5-16-7 DATA COLLECT – COLL(81) Operand Data Areas SBs: Source base word Ladder Symbols IR, SR, AR, DM, HR, TC, LR COLL(81) @COLL(81) C: Offset data (BCD) IR, SR, AR, DM, HR, TC, LR, # D: Destination word IR, SR, AR, DM, HR, TC, LR Limitations C must be a BCD.
  • Page 204 Data Movement Section 5-16 Example In the following example, the content of C (HR 00) is 9010, and COLL(81) is used to copy the oldest entries from a10-word stack (IR 001 to IR 010) to LR 20. 00001 Address Instruction Operands DIST(80) 00000...

  • Page 205: Move Bit - Movb(82)

    Data Movement Section 5-16 Example In the following example, the content of C (HR 00) is 8010, and COLL(81) is used to copy the most recent entries from a 10-word stack (IR 001 to IR 010) to LR 20. 00001 Address Instruction Operands...

  • Page 206: Move Digit - Movd

    Data Movement Section 5-16 Description When the execution condition is OFF, MOVB(82) is not executed. When the execution condition is ON, MOVB(82) copies the specified bit of S to the speci- fied bit in D. The bits in S and D are specified by Bi. The rightmost two digits of Bi designate the source bit;...

  • Page 207: Transfer Bits - Xfrb(62)

    Data Movement Section 5-16 Digit Designator The following show examples of the data movements for various values of Di. Di: 0010 Di: 0030 Di: 0031 Di: 0023 Flags At least one of the rightmost three digits of Di is not between 0 and 3. Indirectly addressed DM word is non-existent.

  • Page 208: Em Block Transfer - Xfr2

    Data Movement Section 5-16 Example In the following example, XFRB(62) is used to transfer 5 bits from IR 020 to LR 21 when IR 00001 is ON. The starting bit in IR 020 is 0, and the starting bit in LR 21 is 4, so IR 02000 to IR 02004 are copied to LR 2104 to LR 2108.

  • Page 209: Em Bank Transfer - Bxf2

    Data Movement Section 5-16 Example The following example copies the contents of the 300 words from DM 0000 through DM 0299 to EM 2000 through EM 2299 in the current EM bank. Address Instruction Operands 00000 XFR2(––) 00200 00000 00201 XFR2(––) #0300 0300...

  • Page 210: Data Comparison

    Data Comparison Section 5-17 Example The following example copies the contents of the 300 words from DM 0000 through DM 0299 to EM 2000 through EM 2299 in the EM bank 01. (EM bank 00 isn’t used as the source because S isn’t a constant.) Address Instruction Operands 00000...

  • Page 211: Compare - Cmp(20)

    Data Comparison Section 5-17 Example The following example shows the comparisons made and the results provided for MCMP(19). Here, the comparison is made during each cycle when 00000 is 00000 Address Instruction Operands MCMP(19) 00000 00000 00001 MCMP(19) DM 0200 DM 0300 0200 0300...
  • Page 212 Data Comparison Section 5-17 Indirectly addressed DM word is non-existent. (Content of DM word is Flags not BCD, or the DM area boundary has been exceeded.) ON if Cp1 equals Cp2. ON if Cp1 is less than Cp2. ON if Cp1 is greater than Cp2. Flag Address C1 <...
  • Page 213 Data Comparison Section 5-17 The branching structure of this diagram is important in order to ensure that 00200, 00201, and 00202 are controlled properly as the timer counts down. Be- cause all of the comparisons here use to the timer’s PV as reference, the other operand for each CMP(20) must be in 4-digit BCD.

  • Page 214: Double Compare - Cmpl(60)

    Data Comparison Section 5-17 5-17-3 DOUBLE COMPARE – CMPL(60) Ladder Symbols Operand Data Areas Cp1: First word of first compare word pair CMPL(60) IR, SR, AR, DM, HR, TC, LR Cp2: First word of second compare word pair IR, SR, AR, DM, HR, TC, LR 000 (fixed) Limitations Cp1 and Cp1+1 must be in the same data area, as must Cp2 and Cp2+1.

  • Page 215: Block Compare - Bcmp(68)

    Data Comparison Section 5-17 Example: The following example shows how to save the comparison result immediately. If Saving CMPL(60) Results the content of HR 10, HR 09 is greater than that of 011, 010, then 00200 is turned ON; if the two contents are equal, 00201 is turned ON; if content of HR 10, HR 09 is less than that of 011, 010, then 00202 is turned ON.
  • Page 216 Data Comparison Section 5-17 Description When the execution condition is OFF, BCMP(68) is not executed. When the execution condition is ON, BCMP(68) compares CD to the ranges defined by a block consisting of of CB, CB+1, CB+2, ..., CB+31. Each range is defined by two words, the first one providing the lower limit and the second word providing the upper limit.
  • Page 217 Data Comparison Section 5-17 Example The following example shows the comparisons made and the results provided for BCMP(68). Here, the comparison is made during each cycle when 00000 is 00000 Address Instruction Operands BCMP(68) 00000 00000 00001 BCMP(68) HR 10 HR 05 CD 001 Lower limits...

  • Page 218: Area Range Compare - Zcp(88)

    Data Comparison Section 5-17 Example The following example shows the comparisons made and the results provided for TCMP(85). Here, the comparison is made during each cycle when 00000 is Address Instruction Operands 00000 TCMP(85) 00000 00000 00001 TCMP(85) HR 10 HR 05 CD: 001 Upper limits...

  • Page 219: Double Area Range Compare - Zcpl

    Data Comparison Section 5-17 Precautions Placing other instructions between ZCP(88) and the operation which accesses the EQ, LE, and GR flags may change the status of these flags. Be sure to ac- cess them before the desired status is changed. Indirectly addressed DM word is non-existent.

  • Page 220: Signed Binary Compare - Cps

    Data Comparison Section 5-17 Description When the execution condition is OFF, ZCPL(––) is not executed. When the execution condition is ON, ZCPL(––) compares the 8-digit value in CD, CD+1 to the range defined by lower limit LL+1,LL and upper limit UL+1,UL and outputs the result to the GR, EQ, and LE flags in the SR area.

  • Page 221: Double Signed Binary Compare - Cpsl(--)

    Data Comparison Section 5-17 Indirectly addressed DM word is non-existent. (Content of DM word is Flags not BCD, or the DM area boundary has been exceeded.) ON if Cp1 equals Cp2. ON if Cp1 is less than Cp2. ON if Cp1 is greater than Cp2. Flag status Comparison result GR (SR 25505)

  • Page 222: Data Conversion

    Data Conversion Section 5-18 5-18 Data Conversion The conversion instructions convert word data that is in one format into another format and output the converted data to specified result word(s). Conversions are available to convert between binary (hexadecimal) and BCD, to 7-segment display data, to ASCII, and between multiplexed and non-multiplexed data.

  • Page 223: Double Bcd-To-Double Binary - Binl(58)

    Data Conversion Section 5-18 5-18-2 DOUBLE BCD-TO-DOUBLE BINARY – BINL(58) Ladder Symbols Operand Data Areas S: First source word (BCD) BINL(58) @BINL(58) IR, SR, AR, DM, HR, TC, LR R: First result word IR, SR, AR, DM, HR, LR Description When the execution condition is OFF, BINL(58) is not executed.

  • Page 224: Double Binary-To-Double Bcd - Bcdl(59)

    Data Conversion Section 5-18 Note If the content of S exceeds 270F, the converted result would exceed 9999 and BCD(24) will not be executed. When the instruction is not executed, the content of R remains unchanged. Signed Binary Data BCD(24) cannot be used to convert signed binary data directly to BCD. To con- vert signed binary data, first determine whether the data is positive or negative.

  • Page 225: Hours-To-Seconds - Sec(65)

    Data Conversion Section 5-18 5-18-5 HOURS-TO-SECONDS – SEC(65) Operand Data Areas S: Beginning source word (BCD) Ladder Symbols IR, SR, AR, DM, HR, TC, LR SEC(65) @SEC(65) R: Beginning result word (BCD) IR, SR, AR, DM, HR, TC, LR 000: Set to 000. Limitations S and S+1 must be within the same data area.

  • Page 226: Seconds-To-Hours - Hms(66)

    Data Conversion Section 5-18 5-18-6 SECONDS-TO-HOURS – HMS(66) Operand Data Areas S: Beginning source word (BCD) Ladder Symbols IR, SR, AR, DM, HR, TC, LR HMS(66) @HMS(66) R: Beginning result word (BCD) IR, SR, AR, DM, HR, TC, LR 000: Set to 000. Limitations S and S+1 must be within the same data area.

  • Page 227: 4-To-16/8-To-256 Decoder - Mlpx(76)

    Data Conversion Section 5-18 5-18-7 4-TO-16/8-TO-256 DECODER – MLPX(76) Operand Data Areas S: Source word Ladder Symbols IR, SR, AR, DM, HR, TC, LR MLPX(76) @MLPX(76) C: Control word IR, SR, AR, DM, HR, TC, LR, # R: First result word IR, SR, AR, DM, HR, LR Limitations When the leftmost digit of C is 0, the rightmost two digits of C must each be be-...
  • Page 228 Data Conversion Section 5-18 Some example C values and the digit-to-word conversions that they produce are shown below. C: 0010 C: 0030 R + 1 R + 1 R + 2 R + 3 C: 0031 C: 0023 R + 1 R + 1 R + 2 R + 2...
  • Page 229 Data Conversion Section 5-18 The 4 possible C values and the conversions that they produce are shown be- low. (In S, 0 indicates the rightmost byte and 1 indicates the leftmost byte.) C: 1000 C: 1001 R to R+15 R to R+15 R+16 to R+31 R+16 to R+31 C: 1010...

  • Page 230: 16-To-4/256-To-8 Encoder - Dmpx(77)

    Data Conversion Section 5-18 Example: The following program converts three digits of data from LR 20 to bit positions 4-bit to 16-bit Decoding and turns ON the corresponding bits in three consecutive words starting with HR 10. 00000 Address Instruction Operands MLPX(76) 00000...
  • Page 231 Data Conversion Section 5-18 16-bit to 4-bit Encoder DMPX(77) operates as a 16-bit to 4-bit encoder when the leftmost digit of C is 0. When the execution condition is OFF, DMPX(77) is not executed. When the execution condition is ON, DMPX(77) determines the position of the highest ON bit in S, encodes it into single-digit hexadecimal value corresponding to the bit number, then transfers the hexadecimal value to the specified digit in R.
  • Page 232 Data Conversion Section 5-18 256-bit to 8-bit Encoder DMPX(77) operates as a 256-bit to 8-bit encoder when the leftmost digit of C is set to 1. When the execution condition is OFF, DMPX(77) is not executed. When the execution condition is ON, DMPX(77) determines the position of the highest (leftmost) ON bit in the group of 16 source words from S to S+15 or S+16 to S+31, encodes it into a two-digit hexadecimal value corresponding to the loca- tion of the bit among the 256 bits in the group, then transfers the hexadecimal...

  • Page 233: 7-Segment Decoder - Sdec(78)

    Data Conversion Section 5-18 Example: When 00000 is ON, the following diagram encodes IR words 010 and 011 to the 16-bit to 4-bit Encoding first two digits of HR 20 and then encodes LR 10 and 11 to the last two digits of HR 20.
  • Page 234 Data Conversion Section 5-18 Any or all of the digits in S may be converted in sequence from the designated first digit. The first digit, the number of digits to be converted, and the half of D to receive the first 7-segment display code (rightmost or leftmost 8 bits) are desig- nated in Di.
  • Page 235 Data Conversion Section 5-18 Example The following example shows the data to produce an 8. The lower case letters show which bits correspond to which segments of the 7-segment display. The table underneath shows the original data and converted code for all hexadeci- mal digits.

  • Page 236: Ascii Convert - Asc(86)

    Data Conversion Section 5-18 5-18-10 ASCII CONVERT – ASC(86) Operand Data Areas S: Source word Ladder Symbols IR, SR, AR, DM, HR, TC, LR ASC(86) @ASC(86) Di: Digit designator IR, SR, AR, DM, HR, TC, LR, # D: First destination word IR, SR, AR, DM, HR, LR Limitations Di must be within the values given below...

  • Page 237: Ascii-To-Hexadecimal - Hex

    Data Conversion Section 5-18 Some examples of Di values and the 4-bit binary to 8-bit ASCII conversions that they produce are shown below. Di: 0011 Di: 0030 1st half 1st half 2nd half 2nd half 1st half 2nd half Di: 0112 Di: 0130 1st half 1st half...
  • Page 238 Data Conversion Section 5-18 Limitations Di must be within the values given below. All source words must be in the same data area. Bytes in the source words must contain the ASCII code equivalent of hexadeci- mal values, i.e., 30 to 39 (0 to 9), 41 to 46 (A to F), or 61 to 66 (a to f). Description When the execution condition is OFF, HEX(––) is not executed.
  • Page 239 Data Conversion Section 5-18 Some examples of Di values and the 8-bit ASCII to 4-bit hexadecimal conver- sions that they produce are shown below. Di: 0011 Di: 0030 byte byte byte byte byte byte Di: 0023 Di: 0133 byte byte byte byte byte...

  • Page 240: Scaling - Scl

    Data Conversion Section 5-18 Flags Incorrect digit designator, or data area for destination exceeded. Indirectly addressed DM word is non-existent. (Content of DM word is not BCD, or the DM area boundary has been exceeded.) Example In the following example, the 2 byte of LR 10 and the 1 byte of LR 11 are con- verted to hexadecimal values and those values are written to the first and se-...
  • Page 241 Data Conversion Section 5-18 The following table shows the functions and ranges of the parameter words: Parameter Function Range Comments BCD point #1 (A 0000 to 9999 P1+1 Hex. point #1 (A 0000 to FFFF Do not set P1+1=P1+3. P1+2 BCD point #2 (B 0000 to 9999 P1+3...

  • Page 242: Column To Line - Line(63)

    Data Conversion Section 5-18 5-18-13 COLUMN TO LINE – LINE(63) Operand Data Areas S: First word of 16 word source set Ladder Symbols IR, SR, AR, DM, HR, TC, LR LINE(63) @LINE(63) C: Column bit designator (BCD) IR, SR, AR, DM, HR, TC, LR, # D: Destination word IR, SR, AR, DM, HR, TC, LR Limitations...

  • Page 243: Line To Column - Colm(64)

    Data Conversion Section 5-18 5-18-14 LINE TO COLUMN – COLM(64) Operand Data Areas S: Source word Ladder Symbols IR, SR, AR, DM, HR, TC, LR COLM(64) @COLM(64) D: First word of the destination set IR, AR, DM, HR, TC, LR C: Column bit designator (BCD) IR, SR, AR, DM, HR, TC, LR, # Limitations...

  • Page 244: 2'S Complement - Neg

    Data Conversion Section 5-18 5-18-15 2’S COMPLEMENT – NEG(––) Ladder Symbols Operand Data Areas S: Source word NEG(––) IR, SR, AR, DM, HR, TC, LR, # R: Result word IR, SR, AR, DM, HR, LR Description Converts the four-digit hexadecimal content of the source word (S) to its 2’s complement and outputs the result to the result word (R).

  • Page 245: Double 2'S Complement - Negl(--)

    Data Conversion Section 5-18 5-18-16 DOUBLE 2’S COMPLEMENT – NEGL(––) Ladder Symbols Operand Data Areas S: First source word NEGL(––) IR, SR, AR, DM, HR, TC, LR R: First result word IR, SR, AR, DM, HR, LR Limitations S and S+1 must be in the same data area, as must R and R+1. Description Converts the eight-digit hexadecimal content of the source words (S and S+1) to its 2’s complement and outputs the result to the result words (R and R+1).

  • Page 246: Bcd Calculations

    BCD Calculations Section 5-19 5-19 BCD Calculations The BCD calculation instructions – INC(38), DEC(39), ADD(30), ADDL(54), SUB(31), SUBL(55), MUL(32), MULL(56), DIV(33), DIVL(57), FDIV(79), and ROOT(72) – all perform arithmetic operations on BCD data. For INC(38) and DEC(39) the source and result words are the same. That is, the content of the source word is overwritten with the instruction result.

  • Page 247: Set Carry - Stc(40)

    BCD Calculations Section 5-19 5-19-3 SET CARRY – STC(40) Ladder Symbols STC(40) @STC(40) When the execution condition is OFF, STC(40) is not executed. When the execution condition is ON, STC(40) turns ON CY (SR 25504). Note Refer to Appendix C Error and Arithmetic Flag Operation for a table listing the instructions that affect CY.

  • Page 248: Double Bcd Add - Addl(54)

    BCD Calculations Section 5-19 Example If 00002 is ON, the program represented by the following diagram clears CY with CLC(41), adds the content of LR 25 to a constant (6103), places the result in DM 0100, and then moves either all zeros or 0001 into DM 0101 depending on the status of CY (25504).

  • Page 249: Bcd Subtract - Sub(31)

    BCD Calculations Section 5-19 Flags Au and/or Ad is not BCD. Indirectly addressed DM word is non-existent. (Content of DM word is not BCD, or the DM area boundary has been exceeded.) ON when there is a carry in the result. ON when the result is 0.
  • Page 250 BCD Calculations Section 5-19 Flags Mi and/or Su is not BCD. Indirectly addressed DM word is non-existent. (Content of DM word is not BCD, or the DM area boundary has been exceeded.) ON when the result is negative, i.e., when Mi is less than Su plus CY. ON when the result is 0.

  • Page 251: Double Bcd Subtract - Subl(55)

    BCD Calculations Section 5-19 Note The actual SUB(31) operation involves subtracting Su and CY from 10,000 plus Mi. For positive results the leftmost digit is truncated. For negative results the 10s complement is obtained. The procedure for establishing the correct answer is given below.
  • Page 252 BCD Calculations Section 5-19 Flags Mi, M+1,Su, and Su+1 are not BCD. Indirectly addressed DM word is non-existent. (Content of DM word is not BCD, or the DM area boundary has been exceeded.) ON when the result is negative, i.e., when Mi is less than Su. ON when the result is 0.

  • Page 253: Bcd Multiply - Mul(32)

    BCD Calculations Section 5-19 5-19-9 BCD MULTIPLY – MUL(32) Operand Data Areas Md: Multiplicand (BCD) Ladder Symbols IR, SR, AR, DM, HR, TC, LR, # MUL(32) @MUL(32) Mr: Multiplier (BCD) IR, SR, AR, DM, HR, TC, LR, # R: First result word IR, SR, AR, DM, HR LR Limitations R and R+1 must be in the same data area.

  • Page 254: Double Bcd Multiply - Mull(56)

    BCD Calculations Section 5-19 5-19-10 DOUBLE BCD MULTIPLY – MULL(56) Operand Data Areas Md: First multiplicand word (BCD) Ladder Symbols IR, SR, AR, DM, HR, TC, LR MULL(56) @MULL(56) Mr: First multiplier word (BCD) IR, SR, AR, DM, HR, TC, LR R: First result word IR, SR, AR, DM, HR LR Limitations...

  • Page 255: Double Bcd Divide - Divl(57)

    BCD Calculations Section 5-19 Flags Dd or Dr is not in BCD or when Dr is #0000. Indirectly addressed DM word is non-existent. (Content of DM word is not BCD, or the DM area boundary has been exceeded.) ON when the result is 0. Example When IR 00000 is ON with the following program, the content of IR 020 is divided by the content of HR 09 and the result is placed in DM 0017 and DM 0018.

  • Page 256: Floating Point Divide - Fdiv(79)

    BCD Calculations Section 5-19 5-19-13 FLOATING POINT DIVIDE – FDIV(79) Operand Data Areas Dd: First dividend word (BCD) Ladder Symbols IR, SR, AR, DM, HR, TC, LR FDIV(79) @FDIV(79) Dr: First divisor word (BCD) IR, SR, AR, DM, HR, TC, LR R: First result word IR, SR, AR, DM, HR, LR Limitations...
  • Page 257 BCD Calculations Section 5-19 Example The following example shows how to divide two whole four-digit numbers (i.e., numbers without fractions) so that a floating-point value can be obtained. First the original numbers must be placed in floating-point form. Because the numbers are originally without decimal points, the exponent will be 4 (e.g., 3452 would equal 0.3452 x 10 ).
  • Page 258 BCD Calculations Section 5-19 00000 @MOV(21) HR 01 HR 00 #0000 HR 00 @MOV(21) 0000 #0000 HR 02 @MOV(21) HR 01 HR 00 #4000 HR 01 @MOV(21) 4000 #4000 HR 03 DM 0000 @MOVD(83) DM 0000 #0021 HR 01 HR 00 HR 01 00000 @MOVD(83)

  • Page 259: Square Root - Root(72)

    BCD Calculations Section 5-19 5-19-14 SQUARE ROOT – ROOT(72) Ladder Symbols Operand Data Areas Sq: First source word (BCD) ROOT(72) @ROOT(72) IR, SR, AR, DM, HR, TC, LR R: Result word IR, SR, AR, DM, HR, LR, Limitations Sq and Sq+1 must be in the same data area. Description When the execution condition is OFF, ROOT(72) is not executed.
  • Page 260 BCD Calculations Section 5-19 In this example, √6017 = 77.56, and 77.56 is rounded off to 78. 00000 @BSET(71) DM 0101 DM 0100 #0000 DM 0100 DM 0101 0000 0000 @MOV(21) DM 0101 DM 0101 DM 0100 @ROOT(72) DM 0100 60170000= 77.56932 DM 0102 @MOV(21)

  • Page 261: Binary Calculations

    Binary Calculations Section 5-20 5-20 Binary Calculations Binary calculation instructions — ADB(50), SBB(51), MLB(52), DVB(53), ADBL(––), SBBL(––), MBS(––), MBSL(––), DBS(––), and DBSL(––) — perform arithmetic operations on hexadecimal data. Four of these instructions (ADB(50), SBB(51), ADBL(––), and SBBL(––)) can act on both normal and signed data, two (MLB(52) and DVB(53)) act only on nor- mal data, and four (MBS(––), MBSL(––), DBS(––), and DBSL(––)) act only on signed binary data.
  • Page 262 Binary Calculations Section 5-20 Example 1: The following example shows a four-digit addition with CY used to place either Adding Normal Data #0000 or #0001 into R+1 to ensure that any carry is preserved. Address Instruction Operands TR 0 00000 00000 00000 CLC(41)

  • Page 263: Binary Subtract - Sbb(51)

    Binary Calculations Section 5-20 In the case below, 25,321 +(–13,253) = 12,068 (62E9 + CC3B = 2F24). Neither OF nor UF are turned ON. Au: LR 20 Ad: DM 0010 Ad: DM 0010 Note The status of the CY flag can be ignored when adding signed binary data since it is relevant only in the addition of normal hexadecimal values.
  • Page 264 Binary Calculations Section 5-20 Example 1: Normal Data The following example shows a four-digit subtraction with CY used to place ei- ther #0000 or #0001 into R+1 to ensure that any carry is preserved. Address Instruction Operands TR 1 00001 00000 00001 CLC(41)
  • Page 265 Binary Calculations Section 5-20 Example 2: In the following example, SBB(51) is used to subtract one 16-bit signed binary Signed Binary Data value from another. (The 2’s complement is used to express negative values). The effective range for 16-bit signed binary values is –32,768 (8000) to +32,767 (7FFF).

  • Page 266: Binary Multiply - Mlb(52)

    Binary Calculations Section 5-20 5-20-3 BINARY MULTIPLY – MLB(52) Operand Data Areas Md: Multiplicand word (binary) Ladder Symbols IR, SR, AR, DM, HR, TC, LR, # MLB(52) @MLB(52) Mr: Multiplier word (binary) IR, SR, AR, DM, HR, TC, LR, # R: First result word IR, SR, AR, DM, HR LR Limitations...

  • Page 267: Double Binary Add - Adbl(--)

    Binary Calculations Section 5-20 Precautions DVB(53) cannot be used to divide signed binary data. Use DBS(––) instead. Re- fer to 5-20-9 SIGNED BINARY DIVIDE – DBS(––) for details. Flags Dr contains 0. Indirectly addressed DM word is non-existent. (Content of DM word is not BCD, or the DM area boundary has been exceeded.) ON when the result is 0.
  • Page 268 Binary Calculations Section 5-20 ADBL(––) can also be used to add signed binary data. The overflow and under- flow flags (SR 25404 and SR 25405) indicate whether the result has exceeded the lower or upper limits of the 32-bit signed binary data range. Refer to page 27 for details on signed binary data.

  • Page 269: Double Binary Subtract - Sbbl(--)

    Binary Calculations Section 5-20 In the case below, 1,799,100,099 + (–282,751,929) = 1,516,348,100 (6B3C167D + EF258C47 = 5A61A2C4). Neither OF nor UF are turned ON. Au : LR 20 Au + 1 : LR 21 Ad + 1 : DM 0011 Ad : DM 0010 CY (Cleared with CLC(41)) R + 1 : DM 0021...
  • Page 270 Binary Calculations Section 5-20 Indirectly addressed DM word is non-existent. (Content of DM word is Flags not BCD, or the DM area boundary has been exceeded.) ON when the result is negative, i.e., when Mi is less than Su plus CY. ON when the result is 0.

  • Page 271: Signed Binary Multiply - Mbs

    Binary Calculations Section 5-20 In the case below, 1,799,100,099 – (–282,751,929) = 2,081,851,958 (6B3C 167D – {EF25 8C47 – 1 0000 0000} = 7C16 8A36). Neither OF nor UF are turned ON. Au : 000 Au + 1 : 001 Ad + 1 : DM 0021 Ad : DM 0020 –...

  • Page 272: Double Signed Binary Multiply - Mbsl(--)

    Binary Calculations Section 5-20 Example In the following example, MBS(––) is used to multiply the signed binary contents of IR 001 with the signed binary contents of DM 0020 and output the result to LR 21 and LR 22. Address Instruction Operands 00000 MBS(––)

  • Page 273: Signed Binary Divide - Dbs

    Binary Calculations Section 5-20 Example In the following example, MBSL(––) is used to multiply the signed binary con- tents of IR 101 and IR 100 with the signed binary contents of DM 0021 and DM 0020 and output the result to LR 24 through LR 21. Address Instruction Operands 00000...

  • Page 274: Double Signed Binary Divide - Dbsl(--)

    Binary Calculations Section 5-20 Example In the following example, DBS(––) is used to divide the signed binary contents of IR 001 with the signed binary contents of DM 0020 and output the result to LR 21 and LR 22. Address Instruction Operands 00000 DBS(––)

  • Page 275: Special Math Instructions

    Special Math Instructions Section 5-21 Example In the following example, DBSL(––) is used to divide the signed binary contents of IR 002 and IR 001 with the signed binary contents of DM 0021 and DM 0020 and output the result to LR 24 through LR 21. Address Instruction Operands 00000...

  • Page 276: Find Minimum - Min

    Special Math Instructions Section 5-21 If bit 15 of C is ON and more than one address contains the same maximum val- ue, the position of the lowest of the addresses will be output to D+1. The number of words within the range (N) is contained in the 3 rightmost digits of C, which must be BCD between 001 and 999.

  • Page 277: Average Value - Avg

    Special Math Instructions Section 5-21 2. For an address in another data area, the number of addresses from the be- ginning of the search is written to D+1. For example, if the address contain- ing the minimum value is IR 114 and the first word in the search range is IR 014, then #0100 is written in D+1.
  • Page 278 Special Math Instructions Section 5-21 For the first N–1 cycles when the execution condition is ON, AVG(––) writes the value of S to D. Each time that AVG(––) is executed, the previous value of S is stored in words D+2 to D+N+1. The first 2 digits of D+1 are incremented with each execution and act as a pointer to indicate where the previous value is stored.

  • Page 279: Sum - Sum(--)

    Special Math Instructions Section 5-21 Example In the following example, the content of IR 040 is set to #0000 and then increm- ented by 1 each cycle. For the first two cycles, AVG(––) moves the content of IR 040 to DM 1002 and DM 1003. The contents of DM 1001 will also change (which can be used to confirm that the results of AVG(––) has changed).
  • Page 280 Special Math Instructions Section 5-21 Description When the execution condition is OFF, SUM(––) is not executed. When the execution condition is ON, SUM(––) adds either the contents of words R +N–1 or the bytes in words R to R +N/2–1 and outputs that value to the des- tination words (D and D+1).

  • Page 281: Arithmetic Process - Apr(69)

    Special Math Instructions Section 5-21 Example In the following example, the BCD contents of the 10 words from DM 0000 to DM 0009 are added when IR 00001 is ON and the result is written to DM 0100 and DM 0101. 00001 Address Instruction Operands...
  • Page 282 Special Math Instructions Section 5-21 Examples Sine Function The following example demonstrates the use of the APR(69) sine function to cal- culate the sine of 30°. The sine function is specified when C is #0000. Address Instruction Operands 00000 APR(69) 00000 00000 #0000...
  • Page 283 Special Math Instructions Section 5-21 Enter the coordinates of the m+1 end-points, which define the m line segments, as shown in the following table. Enter all coordinates in BIN form. Always enter the coordinates from the lowest X value (X ) to the highest (X ).
  • Page 284 Special Math Instructions Section 5-21 In this case, the input data word, IR 010, contains #0014, and f(0014) = #0726 is output to R, IR 011. $1F20 $0F00 (x,y) $0726 $0402 (0,0) $0005 $0014 $001A $05F0 5-21-6 PID CONTROL – PID(––) Operand Data Areas Ladder Symbol S: Input word...
  • Page 285 Special Math Instructions Section 5-21 Note 1. The actual integral and derivative times are calculated using the values set in C+2 and C+3 and the time unit set in C+6. 2. Setting the 2-PID parameter (α) to 000 yields 0.65, the normal value. 3.
  • Page 286 Set to between 1 and 8191 times the sampling period when a constant time is used. Sampling period This sets the period for executing the PID C200HX/HG/HE, CQM1-CPU4j-EV1: operation. 0001 to 1023 (4 digits BCD); (0.1 to 102.3 s, in units of 0.1 s) C200HX/HG/HE only: 0001 to 9999 (4 digits BCD);...
  • Page 287 Special Math Instructions Section 5-21 Execution Condition ON The PID operation is executed at the intervals based on the sampling period, according to the PID parameters that have been set. Sampling Period and PID Execution Timing The sampling period is the time interval to retrieve the measurement data for carrying out a PID operation.
  • Page 288 Special Math Instructions Section 5-21 cording to the time that has passed. The strength of the integral operation is indi- cated by the integral time, which is the time required for the integral operation amount to reach the same level as the proportional operation amount with re- spect to the step deviation, as shown in the following illustration.
  • Page 289 Special Math Instructions Section 5-21 PID Operation PID operation combines proportional operation (P), integral operation (I), and derivative operation (D). It produces superior control results even for control ob- jects with dead time. It employs proportional operation to provide smooth control without hunting, integral operation to automatically correct any offset, and deriv- ative operation to speed up the response to disturbances.
  • Page 290 Special Math Instructions Section 5-21 • When it is not a problem if a certain amount of time is required for stabilization (settlement time), but it is important not to cause overshooting, then enlarge the proportional band. Control by measured PID When P is enlarged •...
  • Page 291 Special Math Instructions Section 5-21 The PID constants used in PID calculations will not be changed if the proportion- al band (P), integral constant (Tik), or derivative constant is changed after IR 00000 turns ON. DM 0200 012C Set value: 300 C+1: DM 0201 0100 Proportional band: 10.0%...
  • Page 292 Special Math Instructions Section 5-21 converted back to the range 0000 to 1770 Hex, again using APR(069), for output from the Analog Output Unit. From Analog Input Unit Execution condition Control Data (DM 1000): C000 Hex (binary with one table) DM 1000 C+1 (DM 1001): 1770 Hex (Xm) Analog input word...
  • Page 293 Special Math Instructions Section 5-21 Example 2 This example shows a PID control program using PID(––). AD001 DA001 Unit Amplifier (See note below.) Fan (Output word IR 111) Temperature sensing element (Output word IR 100) Amplifier (See note below.) Heater (Output word IR110) Note Motors and heaters cannot be directly connected from an Analog Output Unit.
  • Page 294 Special Math Instructions Section 5-21 Creating the Program Follow the procedure outlined below in creating the program. 1, 2, 3... 1. Set the target value (binary 0000 to 0FFF) in DM 0000. 2. Input the PV of the temperature sensing element (binary 000 to 0FFF) in bits 0 to 11 of word 101.

  • Page 295: Logic Instructions

    Logic Instructions Section 5-22 Note When using PID(––) or SCL(––), make the data settings in advance with a Pe- ripheral Device such as the Programming Console or SSS. Heater Target value HR HR 00 (DM0000) Proportional band HR 01 0080 0200 Integral time/sampling period HR 02...

  • Page 296: Logical And - Andw(34)

    Logic Instructions Section 5-22 Indirectly addressed DM word is non-existent. (Content of DM word is Flags not BCD, or the DM area boundary has been exceeded.) ON when the result is 0. ON when bit 15 of Wd is set to 1. 5-22-2 LOGICAL AND –...

  • Page 297: Logical Or - Orw(35)

    Logic Instructions Section 5-22 5-22-3 LOGICAL OR – ORW(35) Operand Data Areas I1: Input 1 Ladder Symbols IR, SR, AR, DM, HR, TC, LR, # ORW(35) @ORW(35) I2: Input 2 IR, SR, AR, DM, HR, TC, LR, # R: Result word IR, SR, AR, DM, HR, LR Description When the execution condition is OFF, ORW(35) is not executed.

  • Page 298: Exclusive Or - Xorw

    Logic Instructions Section 5-22 5-22-4 EXCLUSIVE OR – XORW(36) Operand Data Areas I1: Input 1 Ladder Symbols IR, SR, AR, DM, HR, TC, LR, # XORW(36) @XORW(36) I2: Input 2 IR, SR, AR, DM, HR, TC, LR, # R: Result word IR, SR, AR, DM, HR, LR Description When the execution condition is OFF, XORW(36) is not executed.

  • Page 299: Exclusive Nor - Xnrw

    Subroutines and Interrupt Control Section 5-23 5-22-5 EXCLUSIVE NOR – XNRW(37) Operand Data Areas I1: Input 1 Ladder Symbols IR, SR, AR, DM, HR, TC, LR, # XNRW(37) @XNRW(37) I2: Input 2 IR, SR, AR, DM, HR, TC, LR, # R: Result word IR, SR, AR, DM, HR, LR Description...

  • Page 300: Interrupts

    In high-speed mode the CPU Unit interrupts the current process. The normal mode is the de- fault mode in C200HX/HG/HE PCs, but high-speed mode can be selected in the PC Setup.
  • Page 301 Subroutines and Interrupt Control Section 5-23 started. The program must be designed to allow for this when required by the application. (See the section on data concurrence for further details.) Input Interrupts Input interrupts are executed when external inputs are received via an Interrupt Input Unit.
  • Page 302 Subroutines and Interrupt Control Section 5-23 Note Disabling special I/O refreshing in the normal cycle to refresh special I/O in an interrupt subroutine is necessary only in the high-speed mode. Disabling normal cycle refreshing of special I/O during normal interrupt mode will be ignored and the special I/O will be refreshed both in the normal cycle and in the interrupt sub- routine.

  • Page 303: Subroutine Enter - Sbs(91)

    Subroutines and Interrupt Control Section 5-23 • Use the I/O REFRESH instruction in interrupt subroutines to refresh required I/O from Special I/O Units and mask interrupts in the main program while read- ing/writing Special I/O Unit words. 5-23-3 SUBROUTINE ENTER – SBS(91) Ladder Symbol Definer Data Areas N: Subroutine number...

  • Page 304: Subroutine Define And Return - Sbn(92)/Ret(93)

    Subroutines and Interrupt Control Section 5-23 The following diagram illustrates program execution flow for various execution conditions for two SBS(91). SBS(91) OFF execution conditions for subroutines 000 and 001 Main program SBS(91) ON execution condition for subroutine 000 only ON execution condition for SBN(92) subroutine 001 only RET(93)

  • Page 305: Macro - Mcro(99)

    Subroutines and Interrupt Control Section 5-23 All subroutines must be programmed at the end of the main program. When one or more subroutines have been programmed, the main program will be executed up to the first SBN(92) before returning to address 00000 for the next cycle.
  • Page 306 Subroutines and Interrupt Control Section 5-23 In the following example, the contents of DM 0010 through DM 0013 are copied to SR 290 through SR 293, the contents of DM 0020 through DM 0023 are co- pied to SR 294 through SR 297, and subroutine 010 is called and executed. When the subroutine is completed, the contents of SR 294 through SR 297 are copied back to DM 0020 to DM 0023.

  • Page 307: Interrupt Control - Int(89)

    Subroutines and Interrupt Control Section 5-23 Example The following examples shows the use of four MCRO(99) instructions that ac- cess the same subroutine. The program section on the left shows the same pro- gram without the use of MCRO(99). 25313 00000 10001 MCRO(99)
  • Page 308 Subroutines and Interrupt Control Section 5-23 Description INT(89) is used to control interrupts and performs one of 11 functions depending on the values of C and N. As shown in the following tables, six of the functions act on input interrupts, three act on the scheduled interrupt, and the other two mask or unmask all interrupts.
  • Page 309 Subroutines and Interrupt Control Section 5-23 Read Interrupt Interval This function is used to write the current setting for the scheduled interrupt inter- (N=004, C=002) val to word D. Mask/Unmasking All This function is used to mask or unmask all interrupt processing. Masked inputs Interrupts (C=100/200) are recorded, but ignored.
  • Page 310 Subroutines and Interrupt Control Section 5-23 The scheduled interrupt is disabled at the start of operation (the scheduled inter- rupt interval is 0), so the time to the first interrupt and scheduled interrupt interval must be set using INT(89) with N=004 and C=001/000. In the following diagram, the subroutine would be executed every 20 ms if the scheduled interrupt time unit is set to 10 ms in DM 6622 of the PC Setup.
  • Page 311 Subroutines and Interrupt Control Section 5-23 Flow of Processing When the interrupt occurs while processing ADD, the addition result, 1235, is saved temporarily in memory and not stored in DM 0000. Although #0010 is moved to DM 0000 in the interrupt program, the addition result that was saved is written to DM 0000 as soon as processing returns to the main program, effec- tively undoing the results of the interrupt program.
  • Page 312 Subroutines and Interrupt Control Section 5-23 Flow of Processing Processing was interrupted for BSET when #1234 was not yet written to DM 0010. Therefore, in the comparison at point *1, the contents of DM 0000 and DM 0001 are not equal and processing stops with A in the OFF state. As a result, although the contents of DM 0000 and DM 0010 agree at the value 1234, an in- correct comparison result is reflected in comparison result output A.

  • Page 313: Step Instructions

    Step Instructions Section 5-24 5-24 Step Instructions The step instructions STEP(08) and SNXT(09) are used in conjunction to set up breakpoints between sections in a large program so that the sections can be executed as units and reset upon completion. A section of program will usually be defined to correspond to an actual process in the application.
  • Page 314 Step Instructions Section 5-24 Execution of a step is completed either by execution of the next SNXT(09) or by turning OFF the control bit for the step (see example 3 below). When the step is completed, all of the IR and HR bits in the step are turned OFF. All timers in the step except TTIM(––) are reset to their SVs.
  • Page 315 Step Instructions Section 5-24 Flags 25407: Step Start Flag; turns ON for one cycle when STEP(08) is executed and can be used to reset counters in steps as shown below if necessary. 00000 Start SNXT(09) 01000 01000 STEP(08) 01000 00100 CNT 01 25407 25407...
  • Page 316 Step Instructions Section 5-24 The following diagram demonstrates the flow of processing and the switches that are used for execution control. Process A Loading Process B Part Installation Process C Inspection/discharge...
  • Page 317 Step Instructions Section 5-24 The program for this process, shown below, utilizes the most basic type of step programming: each step is completed by a unique SNXT(09) that starts the next step. Each step starts when the switch that indicates the previous step has been completed turns ON.
  • Page 318 Step Instructions Section 5-24 Example 2: The following process requires that a product is processed in one of two ways, Branching Execution depending on its weight, before it is printed. The printing process is the same regardless of which of the first processes is used. Various sensors are posi- tioned to signal when processes are to start and end.
  • Page 319 Step Instructions Section 5-24 The program for this process, shown below, starts with two SNXT(09) instruc- tions that start processes A and B. Because of the way 00001 (SW A1) and 00002 (SB B1) are programmed, only one of these will be executed to start either process A or process B.
  • Page 320 Step Instructions Section 5-24 Example 3: The following process requires that two parts of a product pass simultaneously Parallel Execution through two processes each before they are joined together in a fifth process. Various sensors are positioned to signal when processes are to start and end. Process A Process B Process E...
  • Page 321 Step Instructions Section 5-24 00001 (SW1 and SW2)) Process A started. SNXT(09) LR 0000 Process C started. SNXT(09) LR 0002 STEP(08) LR 0000 Process A 00002 (SW3) Process A reset. SNXT(09) LR 0001 Process B started. STEP(08) LR 0001 Process B Used to LR 0003 turn off...

  • Page 322: Special Instructions

    Special Instructions Section 5-25 Address Instruction Operands Address Instruction Operands 00000 00001 00204 STEP(08) 0002 00001 SNXT(09) 0000 00002 SNXT(09) 0002 Process C 00003 STEP(08) 0000 00300 00003 Process A 00301 SNXT(09) 0003 00302 STEP(08) 0003 00100 00002 00101 SNXT(09) 0001 Process D 00102...

  • Page 323: Cycle Time - Scan(18)

    Special Instructions Section 5-25 FAL(06) produces a non-fatal error and FAL(07) produces a fatal error. When FAL(06) is executed with an ON execution condition, the ALARM/ERROR indi- cator on the front of the CPU Unit will flash, but PC operation will continue. When FALS(07) is executed with an ON execution condition, the ALARM/ERROR indi- cator will light and PC operation will stop.

  • Page 324: Trace Memory Sampling - Trsm(45)

    Special Instructions Section 5-25 5-25-3 TRACE MEMORY SAMPLING – TRSM(45) Data tracing can be used to facilitate debugging programs. To set up and use data tracing it is necessary to have a host computer running SSS; no data tracing is possible from a Programming Console. Data tracing is described in detail in the SSS Operation Manual.

  • Page 325: Message Display - Msg(46)

    Special Instructions Section 5-25 The sampled data is written to trace memory, jumping to the beginning of the memory area once the end has been reached and continuing up to the start marker. This might mean that previously recorded data (i.e., data from this sam- ple that falls before the start marker) is overwritten (this is especially true if the delay is positive).

  • Page 326: Long Message - Lmsg(47)

    Special Instructions Section 5-25 In handling indirectly addressed messages (i.e. DM), those with the lowest DM address values have higher priority. Clearing Messages To clear a message, execute FAL(06) 00 or clear it via a Programming Console using the procedure in 4-6-5 Clearing Error Messages. If the message data changes while the message is being displayed, the display will also change.

  • Page 327: Terminal Mode - Term(48)

    Special Instructions Section 5-25 Description LMSG(47) is used to output a 32-character message to a Programming Con- sole. The message to be output must be in ASCII beginning in word S and end- ing in S+15, unless a shorter message is desired. A shorter message can be pro- duced by placing a null character (0D) into the string;...

  • Page 328: Watchdog Timer Refresh - Wdt(94)

    Special Instructions Section 5-25 Example In the following example, TERM(48) is used to switch the Programming Console to TERMINAL mode when 00000 is ON. Be sure that pin 6 of the CPU Unit’s DIP switch is OFF. 00000 Address Instruction Operands TERM(48) 00000...

  • Page 329: Group-2 High-Density I/O Refresh - Mprf(61)

    Special Instructions Section 5-25 It cannot be used for other I/O words, such as I/O Units on Slave Racks or Group-2 High-density I/O Units. St must be less than or equal to E. Description To refresh I/O words allocated to CPU or Expansion I/O Racks (IR 000 to IR 029 or IR 300 to IR 309), simply specify the first (St) and last (E) I/O words to be re- freshed.

  • Page 330: Bit Counter - Bcnt(67)

    Special Instructions Section 5-25 Refer to 6-1 Cycle Time for a table showing I/O refresh times for Group-2 High-density I/O Units. Flags St or E is not BCD between #0000 and #000F. St is greater than E. 5-25-10 BIT COUNTER – BCNT(67) Operand Data Areas Ladder Symbols N: Number of words (BCD)
  • Page 331 Special Instructions Section 5-25 The function of bits in C are shown in the following diagram and explained in more detail below. 15 14 13 12 11 Number of items in range (N, BCD) 001 to 999 words or bytes First byte (when bit 13 is ON) 1 (ON): Rightmost...

  • Page 332: Failure Point Detection - Fpd

    Special Instructions Section 5-25 Example When IR 00000 is ON in the following example, the frame checksum (0008) is calculated for the 8 words from DM 0000 to DM 0007 and the ASCII equivalent (30 30 30 38) is written to DM 0011 and DM 0010. 00000 Address Instruction Operands...
  • Page 333 Special Instructions Section 5-25 When the execution condition is OFF, FPD(––) is not executed. When the execution condition is ON, FPD(––) monitors the time until the logic diagnostics condition goes ON, turning ON the diagnostic output. If this time exceeds T, the following will occur: 1, 2, 3...
  • Page 334 Special Instructions Section 5-25 D+1 contains the bit address code of the input condition, as shown below. The word addresses, bit numbers, and TC numbers are in binary. Data D+1 bit status area IR, SR Word address Bit number (see (see Word address Bit number...
  • Page 335 Special Instructions Section 5-25 Example In the following example, the FPD(––) is set to display the bit address and mes- sage (“ABC”) when a monitoring time of 123.4 s is exceeded. SR 25315 MOV(21) Address Instruction Operands #4142 00000 25315 HR 15 00001 MOV(21)

  • Page 336: Data Search - Srch

    Special Instructions Section 5-25 5-25-13 DATA SEARCH – SRCH(––) Ladder Symbols Operand Data Areas N: Number of words SRCH(––) @SRCH(––) IR, SR, AR, DM, HR, TC, LR, # : First word in range IR, SR, AR, DM, HR, TC, LR C: Comparison data, result word IR, SR, AR, DM, HR, LR Limitations...

  • Page 337: Expansion Dm Read - Xdmr

    Special Instructions Section 5-25 Example In the following example, the 10 word range from DM 0010 to DM 0019 is searched for addresses that contain the same data as DM 0000 (#FFFF). Since DM 0012 contains the same data, the EQ Flag (SR 25506) is turned ON and #0012 is written to DM 0001.

  • Page 338: Indirect Em Addressing - Iems

    Special Instructions Section 5-25 Example In the following example, the 100 word range from DM 7000 through DM 7099 is copied to DM 0010 through DM 0109 when IR 00001 is ON. 00001 Address Instruction Operands @XDMR(––) 00000 00001 #0100 00001 @XDMR(––) #7000...

  • Page 339: Select Em Bank - Embc

    Special Instructions Section 5-25 Note Input 000 for the second and third operands when using replacement instruc- tions. Flags C is not one of the allowed values. In the following example, IEMS(––) changes the destination for DM to EM Example bank 1 and uses indirect addressing to move #1234 into EM 0001 in EM bank 1.

  • Page 340: Network Instructions

    Network Instructions Section 5-26 5-26 Network Instructions The network instructions are used for communicating with other PCs, BASIC Units, or host computers linked through the SYSMAC NET Link System, SYS- MAC LINK System, Ethernet System, or Controller Link System. 5-26-1 NETWORK SEND – SEND(90) Operand Data Areas Ladder Symbols S: Source beginning word...
  • Page 341 Network Instructions Section 5-26 SYSMAC NET Link Systems The destination port number is always set to 0. Set the destination node number to 0 to send the data to all nodes. Set the network number to 0 to send data to a node on the same Subsystem (i.e., network).
  • Page 342 Network Instructions Section 5-26 Controller Link Systems SEND(90) transmits “n” words beginning with S (the beginning source word for data transmission at the source node) to the “n” words beginning with D (the be- ginning destination word for data reception at destination node N). Source node Destination node N @SEND(90)
  • Page 343 Network Instructions Section 5-26 Indirect Destination Beginning Word Designations D is used to specify the destination beginning word as follows when indirect specification is designated: 12 to 15 08 to 11 04 to 07 00 to 03 Area type Word no. (5th digit) D+1 Word no.
  • Page 344 0 to 6655 Controller Link Systems CV-series PCs have a larger area than C200HX/HG/HE PCs, so the beginning words for sending and receiving at destination nodes cannot always be directly specified by means of SEND(192) and RECV(193) operands. Moreover, de- pending on circumstances, it may be desirable to change the beginning word at destination nodes.

  • Page 345: Network Receive - Recv(98)

    Network Instructions Section 5-26 Examples This example is for a SYSMAC NET Link System. When 00000 is ON, the follow- ing program transfers the content of IR 001 through IR 005 to LR 20 through LR 24 on node 10. 00000 Address Instruction Operands...
  • Page 346 Network Instructions Section 5-26 Control Data Ethernet Systems Refer to the PC Card Unit Operation Manual for details. Word Bits 00 to 07 Bits 08 to 15 Number of words (0 to 1000 in 4-digit hexadecimal, i.e., 0000 to 03E8 hex) Response time limit (0.1 and 25.4 Bits 08 to 11:...
  • Page 347 Network Instructions Section 5-26 Controller Link Systems RECV(98) receives “m” words beginning with S (the beginning word for data transmission at the destination node, M) to the words from D (the beginning word for data reception at the source node) onwards. Source node Destination node M “m”...
  • Page 348 Network Instructions Section 5-26 2. With the message service, there is no guarantee that a message to a des- tination node will reach its destination. It is always possible that the mes- sage may be lost in transit due to noise or some other condition. When using the message service, it is advisable to prevent this situation from occurring by performing resend processing at the node where instructions are issued.

  • Page 349: About Network Communications

    Network Instructions Section 5-26 5-26-3 About Network Communications SEND(90) and RECV(98) are based on command/response processing. That is, the transmission is not complete until the sending node receives and ac- knowledges a response from the destination node. Note that the SEND(90)/RECV(98) Enable Flag is not turned ON until the first END(01) after the transmission is completed.
  • Page 350 Network Instructions Section 5-26 SEND(90)/RECV(98) Enable Flag 00000 25204 12802 12800 prevents execution of SEND(90) until RECV(98) (below) has completed. IR 00000 KEEP(11) is turned ON to start transmission. 12801 12800 12800 @MOV(21) #000A DM 0000 @MOV(21) #0000 DM 0001 Data is placed into control data words to specify the 10 words to be transmitted to @MOV(21)

  • Page 351: Serial Communications Instructions

    Serial Communications Instructions Section 5-27 Address Instruction Operands Address Instruction Operands 00000 00000 00019 AND NOT 12800 00001 25204 00020 12803 00002 AND NOT 12802 00021 KEEP(11) 12802 00003 12801 00022 12802 00004 KEEP(11) 12800 00023 25204 00005 12800 00024 AND NOT 25203 00006...
  • Page 352 Serial Communications Instructions Section 5-27 Note RXD(––) is required to receive data via the peripheral port or RS-232C port only. Transmission sent from a host computer to a Host Link Unit are processed auto- matically and do not need to be programmed. Caution The PC will be incapable of receiving more data once 256 bytes have been re- ceived if received data is not read using RXD(––).

  • Page 353: Transmit - Txd

    Serial Communications Instructions Section 5-27 26406: SR 26406 will be turned ON when data has been received normally at the peripheral port and will be reset when the data is read using RXD(––) is executed. 265: SR 265 contains the number of bytes received at the RS-232C port and is reset to 0000 when RXD(––) is executed.
  • Page 354 Serial Communications Instructions Section 5-27 Note Data is not output when the CTS and DSR signals are monitored. The specified number of bytes will be read from S through S+(N/2)–1, converted to ASCII, and transmitted through the specified port. The bytes of source data shown below will be transmitted in this order: 12345678...

  • Page 355: Change Rs-232C Setup - Stup

    Serial Communications Instructions Section 5-27 When digit 0 of C is 0, the bytes of source data shown above will be transmitted in this order: 12345678... When digit 0 of C is 1, the bytes of source data shown above will be transmitted in this order: 21436587...
  • Page 356 Serial Communications Instructions Section 5-27 Function Word The contents of S through S+4 are copied to the part of the PC Setup address that contains the settings for the port specified by N. Constant The settings for the port specified by N are returned to their default val- (#0000) ues.

  • Page 357: Protocol Macro - Pmcr

    Serial Communications Instructions Section 5-27 5-27-4 PROTOCOL MACRO – PMCR(––) Operand Data Areas Ladder Symbols C: Control word PMCR(––) @PMCR(––) IR, SR, AR, DM, HR, TC, LR, # S: First output word IR, SR, AR, DM, HR, TC, LR, # D: First input word IR, SR, AR, DM, HR, TC, LR Limitations...

  • Page 358: Advanced I/O Instructions

    Advanced I/O Instructions Section 5-28 Example When IR 00000 is ON and SR 28908 (the Communications Board Port A Instruc- tion Execution Flag) is OFF, communications sequence 100 is called in the Com- munications Board and data is transferred through Communications Board port A.
  • Page 359 Advanced I/O Instructions Section 5-28 Do not set C to values other than 000 to 007. Overview When the execution condition is OFF, 7SEG(––) is not executed. When the execution condition is ON, 7SEG(––) reads the source data (either 4 or 8-digit), converts it to 7-segment display data, and outputs that data to the 7-segment display connected to the output indicated by O.
  • Page 360 Advanced I/O Instructions Section 5-28 play) will be turned ON when one round of data is displayed, but there is no need to connect them unless required by the application. OD212 The outputs must be connected from an Output Unit with 8 or more output points for four digits or 16 or more output points for eight digits.

  • Page 361: Digital Switch Input - Dsw

    Advanced I/O Instructions Section 5-28 Timing The timing of data output is shown in the following table. “O” is the first word hold- ing display data and “C” is the output word. Function Bit(s) in O Output status (Data and latch logic depends on C) (4 digits, (4 digits, 1 block)
  • Page 362 Advanced I/O Instructions Section 5-28 Overview DSW(––) is used to read the value set on a digital switch connected to I/O Units. When the execution condition is OFF, DSW(––) is not executed. When the execution condition is ON, DSW(––) reads the 8-digit value set on the digital switch from IW and places the result in R.
  • Page 363 Advanced I/O Instructions Section 5-28 The following example illustrates connections for an A7B Thumbwheel Switch. ID212 Input Unit Thumbwheel Switch OD212 Switch no. 8 Output Unit Note The data read signal is not required in the example. The inputs must be connected to a DC Input Unit with 8 or more input points and the outputs must be connected from a Transistor Output Unit with 8 or more out- put points.
  • Page 364 Advanced I/O Instructions Section 5-28 Using the Instruction If the input word for connecting the digital switch is specified at for word A, and the output word is specified for word B, then operation will proceed as shown below when the program is executed. Four digits: 00 to 03 Input data Leftmost...

  • Page 365: Hexadecimal Key Input - Hky

    Advanced I/O Instructions Section 5-28 5-28-3 HEXADECIMAL KEY INPUT – HKY(––) Ladder Symbols Operand Data Areas IW: Input word HKY(––) IR, SR, AR, DM, HR, LR OW: Control signal output word IR, SR, AR, DM, HR, LR D: First register word IR, SR, AR, DM, HR, LR Limitations D and D+2 must be in the same data area.
  • Page 366 Advanced I/O Instructions Section 5-28 Hardware This instruction inputs 8 digits in hexadecimal from a hexadecimal keyboard. It utilizes 5 output bits and 4 input bits. Prepare the hexadecimal keyboard, and connect the 0 to F numeric key switches, as shown below, to input points 0 through 3 and output points 0 through 3.
  • Page 367 Advanced I/O Instructions Section 5-28 Using the Instruction If the input word for connecting the hexadecimal keyboard is specified at word A, and the output word is specified at word B, then operation will proceed as shown below when the program is executed. 16-key selection control signals 16-key...

  • Page 368: Ten Key Input - Tky

    Advanced I/O Instructions Section 5-28 5-28-4 TEN KEY INPUT – TKY(––) Ladder Symbols Operand Data Areas IW: Input word TKY(––) IR, SR, AR, DM, HR, LR : First register word IR, SR, AR, DM, HR, LR : Key input word IR, SR, AR, DM, HR, LR Limitations and D...
  • Page 369 Advanced I/O Instructions Section 5-28 Using the Instruction If the input word for connecting the 10-key keypad is specified for IW, then opera- tion will proceed as shown below when the program is executed. Before 0 0 0 0 0 0 0 0 execution Input from 10-key 0 0 0 0 0 0 0 1...

  • Page 370: Matrix Input - Mtr

    Advanced I/O Instructions Section 5-28 5-28-5 MATRIX INPUT – MTR(––) Ladder Symbols Operand Data Areas IW: Input word MTR(––) IR, SR, AR, DM, HR, LR OW: Output word IR, SR, AR, DM, HR, LR D: First destination word IR, SR, AR, DM, HR, LR Limitations D and D+3 must be in the same data area.
  • Page 371 Advanced I/O Instructions Section 5-28 Hardware This instruction inputs up to 64 signals from an 8 x 8 matrix using 8 input points and 8 output points. Any 8 x 8 matrix can be used. The inputs must be connected through a DC Input Unit with 8 or more points and the outputs must be connected through a Transistor Output Unit with 8 or more points.

  • Page 372: Special I/O Unit Instructions

    Special I/O Unit Instructions Section 5-29 Example The following examples shows programming MTR(––) in a scheduled subrou- tine, where IORF(97) is programmed to ensure that the I/O words used by MTR(––) are refreshed each time MTR(––) is executed. INT(89) # 0002 INT(89) # 0002 SBN(92)

  • Page 373: Special I/O Unit Write - Iowr

    Special I/O Unit Instructions Section 5-29 Description When the execution condition is OFF, IORD(––) is not executed. When the execution condition is ON, IORD(––) transfers data from the specified Special I/O Unit’s memory to words beginning at D. The source information provides the node number of the Special I/O Unit and the number of words to be read, as shown in the following diagram.
  • Page 374 Special I/O Unit Instructions Section 5-29 Description When the execution condition is OFF, IOWR(––) is not executed. When the execution condition is ON, IOWR(––) transfers data from the words beginning at D to the specified Special I/O Unit’s memory. The destination information pro- vides the node number of the Special I/O Unit and the number of words to be written, as shown in the following diagram.

  • Page 375: Pcmcia Card Macro - Cmcr

    Special I/O Unit Instructions Section 5-29 5-29-3 PCMCIA CARD MACRO – CMCR(––) Operand Data Areas Ladder Symbols C: First control word CMCR(––) @CMCR(––) IR, SR, AR, DM, HR, TC, LR, # S: First command word IR, SR, AR, DM, HR, TC, LR, # D: Response word IR, SR, AR, DM, HR, TC, LR Limitations...
  • Page 376 Special I/O Unit Instructions Section 5-29 Process Number The process number (1 through 4) determines what function CMCR(––) will per- form. Process Process Function number name Write file Writes data from the PC’s memory to the specified file in the Card in the PC Card Unit. Read file Reads data from the specified file in the Card in the PC Card Unit to the PC’s memory.
  • Page 377 Special I/O Unit Instructions Section 5-29 The data length, offset, and command data settings depend on the process number that is specified, as shown in the following table. Process Data length Command data number Offset Data Number of words of data Number of elements of write data Data to be written to the file (BCD: 1 to 1001)
  • Page 378 Special I/O Unit Instructions Section 5-29 SR Bits and the Termination The instruction’s termination code is output to SR 237 after CMCR(––) is Code executed. Also, SR 252 contains flags that indicate the instruction’s completion status (normal/error) and the execution status for operating levels 0 and 1. The following table shows the function of these bits.
  • Page 379 Special I/O Unit Instructions Section 5-29 DM 0000 to DM 0007 contain the control data and DM 0098 to DM 0199 contain the command data, as shown below. Word Content Function DM 0000 Control data DM 0001 47 3A ASCII: “G :”...

  • Page 381: Section 6 Program Execution Timing

    SECTION 6 Program Execution Timing The timing of various operations must be considered both when writing and debugging a program. The time required to execute the program and perform other CPU Unit operations is important, as is the timing of each signal coming into and leaving the PC in order to achieve the desired control action at the right time.

  • Page 382: Cycle Time

    Cycle Time Section 6-1 Cycle Time To aid in PC operation, the average, maximum, and minimum cycle times can be displayed on the Programming Console or any other Programming Device and the maximum cycle time and current cycle time values are held in AR 26 and AR 27.
  • Page 383 Cycle Time Section 6-1 Flowchart of CPU Unit Operation Power application Clears IR area and resets all timers Initialization on power-up Checks I/O Unit connections Resets watchdog timer Checks hardware and Program Memory Overseeing processes Check OK? Resets watchdog timer and Sets error flags and turns program address counter ON or flashes indicator...
  • Page 384 Cycle Time Section 6-1 The first three operations immediately after power application are performed only once each time the PC is turned on. The rest of the operations are per- formed in cyclic fashion. The cycle time is the time that is required for the CPU Unit to complete one of these cycles.
  • Page 385 C200H-OD219 0.23 ms NT Links If the PC is connected to a Programmable Terminal (PT) via a C200HX/HG/HE Interface Unit, the times shown in the following table will be required to refresh I/O for the PT. Number of table entries for PT...

  • Page 386: Calculating Cycle Time

    Calculating Cycle Time Section 6-2 Watchdog Timer and Long Within the PC, the watchdog timer measures the cycle time and compares it to a Cycle Times set value. If the cycle time exceeds the set value of the watchdog timer, a FALS 9F error is generated and the CPU Unit stops.
  • Page 387 Calculating Cycle Time Section 6-2 6-2-1 PC with I/O Units Only Here, we’ll compute the cycle time for a simple PC. The CPU Unit controls only I/O Units, eight on the CPU Rack and five on a 5-slot Expansion I/O Rack. The PC configuration for this would be as shown below.
  • Page 388 Calculating Cycle Time Section 6-2 It is assumed that the program contains 5,000 instructions requiring an average of 0.156 μs each to execute, and that nothing is connected to the RS-232C port and no SYSMAC NET/SYSMAC LINK Unit is mounted. Host Link Unit 8-point 8-point...

  • Page 389: Instruction Execution Times

    Instruction Execution Times The following table lists the execution times for all instructions that are available for the C200HX/HG/HE. The maximum and minimum execution times and the conditions which cause them are given where relevant. When “word” is referred to in the Conditions column, it implies the content of any word except for indirect- ly addressed DM words.
  • Page 390 Instruction Execution Times Section 6-3 Instruction Instruction Conditions Conditions ON execution time (μs) OFF execution time (μs) C200HX C200HG C200HE C200HX C200HG C200HE JMP(04) 7.65 22.35 0.313 0.469 0.938 JME(05) 7.95 22.65 0.313 0.469 0.938 FAL(06) FAL numbers 01 to 99 88.6...
  • Page 391 Instruction Execution Times Section 6-3 Instruction Instruction Conditions Conditions ON execution time (μs) OFF execution time (μs) C200HX C200HG C200HE C200HX C200HG C200HE ASR(26) When shifting a word 11.95 26.65 0.313 0.469 0.938 When shifting DM 22.95 37.65 ROL(27) When rotating a word 13.15...
  • Page 392 Instruction Execution Times Section 6-3 Instruction Instruction Conditions Conditions ON execution time (μs) OFF execution time (μs) C200HX C200HG C200HE C200HX C200HG C200HE Constant × word → word MLB(52) 16.95 31.65 0.313 0.469 0.938 Word × word → word 17.85 32.55...
  • Page 393 Instruction Execution Times Section 6-3 Instruction Instruction Conditions Conditions ON execution time (μs) OFF execution time (μs) C200HX C200HG C200HE C200HX C200HG C200HE SDEC(78) When decoding a word to a word 26.95 41.65 0.313 0.469 0.938 When decoding 2 digits DM to DM 63.3...
  • Page 394 Instruction Execution Times Section 6-3 Instruction Instruction Conditions Conditions ON execution time (μs) OFF execution time (μs) C200HX C200HG C200HE C200HX C200HG C200HE LMSG(––) Word for SV 17.95 32.65 0.313 0.469 0.938 Default: (47) DM for SV 27.65 42.35 TERM(––) 8.55...
  • Page 395 Instruction Execution Times Section 6-3 Instruction Instruction Conditions Conditions ON execution time (μs) OFF execution time (μs) C200HX C200HG C200HE C200HX C200HG C200HE TXD(––) When designating a word 56.1 70.8 0.313 0.469 0.938 When designating DM 99.4 114.1 7SEG(––) Word-designated 4 digits...
  • Page 396 Instruction Execution Times Section 6-3 Instruction Instruction Conditions Conditions ON execution time (μs) OFF execution time (μs) C200HX C200HG C200HE C200HX C200HG C200HE Constant × word → word MBS(––) 20.85 35.55 0.313 0.469 0.938 DM × DM → DM 21.65 36.35...
  • Page 397 Word designation 72.9 0.313 0.469 0.938 DM designation 78.9 DM designation 101.9 Note 1. Same as the C200HX’s instruction execution time. 2. Add 14.7 μs to the C200HX’s instruction execution time. 3. Add 1.1 μs to the C200HX’s instruction execution time.

  • Page 398: O Response Time

    I/O Response Time Section 6-4 I/O Response Time The I/O response time is the time it takes for the PC to output a control signal after it has received an input signal. The time it takes to respond depends on the cycle time and when the CPU Unit receives the input signal relative to the input refresh period.
  • Page 399 I/O Response Time Section 6-4 Maximum I/O Response The PC takes longest to respond when it receives the input signal just after the Time I/O refresh phase of the cycle. In this case the CPU Unit does not recognize the input signal until the end of the next cycle.
  • Page 400 I/O Response Time Section 6-4 In looking at the following timing charts, it is important to remember the se- quence in which processing occurs during the PC scan, particular that inputs will not produce programmed actions until the program has been executed. When calculating the response times involving inputs and outputs from another CPU Unit connected by an I/O Link Unit, the cycle time of the controlling CPU Unit and the cycle time of the PC to which the I/O Link Unit is mounted must both...
  • Page 401 Special I/O Units on Slave Racks. If this is the case, there may be cycles when I/O is not refreshed between the Master and the C200HX/HG/HE CPU Unit. 2. Refreshing is performed for Masters only once per cycle, and then only after confirming completion of the remote cycle.
  • Page 402 I/O Response Time Section 6-4 6-4-3 Host Link Systems The following diagram illustrates the processing that takes place when an input on one PC is transferred through the Host Link System to turn ON an output on another PC. Refer to Host Link System documentation for further details. Output on #31 Input on #0 Command/response for Unit # 0...
  • Page 403 I/O Response Time Section 6-4 In looking at the following timing charts, it is important to remember the se- quence processing occurs during the PC scan, particular that inputs will not pro- duce programmed-actions until the program has been execution. PC Link Unit PC Link Unit Unit 0...
  • Page 404 I/O Response Time Section 6-4 Output ON delay: 15 ms Cycle time for PC of Unit 0: 20 ms Cycle time for PC of Unit 7: 50 ms Minimum transmission time: 2.8 ms+10 ms=12.8 ms Maximum Response Time The following diagram illustrates the data flow that will produce the maximum response time.
  • Page 405 6-4-5 One-to-one Link I/O Response Time When two C200HX/HG/HEs are linked one-to-one, the I/O response time is the time required for an input executed at one of the C200HX/HG/HEs to be output to the other C200HX/HG/HE by means of one-to-one link communications.
  • Page 406 Output ON delay: 10 ms Minimum I/O response time: 82 ms Maximum I/O Response Time The C200HX/HG/HE takes the longest to respond under the following circum- stances: 1, 2, 3... 1. The C200HX/HG/HE receives an input signal just after the input refresh phase of the cycle.
  • Page 407 (0000), the software interrupt response time is less than 10 ms. If the DM 6620 is set for the C200HX/HG/HE mode (1xxx), the software interrupt response time is less than 1 ms. The total interrupt response time is thus as shown in the following table.
  • Page 408 Scheduled interrupt 10 ms max. This restriction does not apply when a C200HW-SLKjj is being used with a C200HX/HG/HE PC. Interrupt Processing Time The processing time from receiving an interrupt input, through program execu- tion, and until a return is made to the original program location is described next.
  • Page 409 I/O Response Time Section 6-4 The interrupt return time is 0.04 ms. Note 1. If there are several elements that can cause interrupts or if the interrupt peri- od is shorted than the average interrupt processing time, the interrupt sub- routine will be executed and the main program will not be executed.

  • Page 411: Section 7 Program Monitoring And Execution

    SECTION 7 Program Monitoring and Execution This section provides the procedures for monitoring and controlling the PC through a Programming Console. Refer to the SYSMAC Support Software Operation Manual for SSS procedures if you are using a computer running SSS. Monitoring Operation and Modifying Data .

  • Page 412: Monitoring Operation And Modifying Data

    Programming Console Operations Section 7-2 Monitoring Operation and Modifying Data The simplest form of operation monitoring is to display the address whose oper- and bit status is to be monitored using the Program Read or one of the search operations. As long as the operation is performed in RUN or MONITOR mode, the status of any bit displayed will be indicated.
  • Page 413 Programming Console Operations Section 7-2 Key Sequence Clears leftmost address Cancels monitor operation (EM area) (EM bank 0, 1, or 2.) Examples The following examples show various applications of this monitor operation. Program Read then Monitor 00100 00100READ T000 1234 T001 o0000 Indicates Completion flag is ON...
  • Page 414 Programming Console Operations Section 7-2 Bit Monitor 00000 00000 00001 00001 00000 CONT 00001 Note The status of TR bits SR flags SR 25503 to 25507 (e.g., the arithmetic flags), cleared when END(01) is executed, cannot be monitored. Word Monitor 00000 00000 CHANNEL...
  • Page 415 Programming Console Operations Section 7-2 Multiple Address Monitoring 00000 00000 T000 0100 00000 T000 0100 00001 T000 0100 00001 T000 OFF 0100 D000000001 T000 ^OFF 0100 D000000001 T000 10FF^ OFF 0100 T000D000000001 0100 10FF^ OFF D000000001 Cancels monitoring 10FF^ OFF of leftmost address 00001 ^ OFF...
  • Page 416 Programming Console Operations Section 7-2 Bit status will remain ON or OFF only as long as the key is held down; the original status will return as soon as the key is released. If a timer is started, the comple- tion flag for it will be turned ON when SV has been reached.
  • Page 417 Programming Console Operations Section 7-2 The following displays show what happens when TIM 000 is set with 00100 OFF (i.e., 00500 is turned ON) and what happens when TIM 000 is reset with 00100 ON (i.e., timer starts operation, turning OFF 00500, which is turned back ON when the timer has finished counting down the SV).
  • Page 418 Programming Console Operations Section 7-2 Example The following example shows the displays that appear when Restore Status is carried out normally. 00000 00000 00000FORCE RELE? 00000FORCE RELE 7-2-4 Hexadecimal/BCD Data Modification When the Bit/Digit Monitor operation is being performed and a BCD or hexadeci- mal value is leftmost on the display, CHG can be input to change the value.
  • Page 419 Programming Console Operations Section 7-2 Example The following example shows the effects of changing the PV of a timer. This example is in MONITOR mode 00000 00000 Monitor status of timer PV that will be changed. T000 0122 Timing PRES VAL? PV decrementing T000 0119 ???? Timing...
  • Page 420 Programming Console Operations Section 7-2 7-2-5 Hex/ASCII Display Change This operation converts DM data displays from 4-digit hexadecimal data to ASCII and vice versa. Key Sequence Word currently displayed. Example 00000 00000 Monitor the desired DM word. 0000 D0000 4412 D0000 Press TR to change the display "AB"...
  • Page 421 Programming Console Operations Section 7-2 7-2-6 4-digit Hex/Decimal Display Change This operation converts data displays from normal or signed 4-digit hexadecimal data to decimal and vice versa. Decimal values from 0 to 65,535 are valid when inputting normal 4-digit hexade- cimal data, and decimal values from –32,768 to +32,767 are valid when inputting signed 4-digit hexadecimal data.
  • Page 422 Programming Console Operations Section 7-2 7-2-7 8-digit Hex/Decimal Display Change This operation converts data displays from normal or signed, 4 or 8-digit hexa- decimal data to decimal and vice versa. Decimal values from 0 to 4,294,967,295 are valid when inputting normal 8-digit hexadecimal data, and decimal values from –2,147,483,648 to +2,147,483,647 are valid when inputting signed 8-digit hexadecimal data.
  • Page 423 Programming Console Operations Section 7-2 7-2-8 Differentiation Monitor This operation can be used to monitor the up or down differentiation status of bits in the IR, SR, AR, LR, HR, and TC areas. To monitor up or down differentiation status, display the desired bit leftmost on the bit monitor display, and then press SHIFT and the Up or Down Arrow Key.
  • Page 424 Programming Console Operations Section 7-2 7-2-9 3-word Monitor To monitor three consecutive words together, specify the lowest numbered word, press MONTR, and then press EXT to display the data contents of the specified word and the two words that follow it. A CLR entry changes the Three-word Monitor operation to a single-word display.
  • Page 425 Programming Console Operations Section 7-2 Example D0002D0001D0000 3-word Monitor 0123 4567 89AB in progress. D0002 3CH CHG? Stops in the middle =0123 4567 89AB of monitoring. D0002 3CH CHG? Input new data. 0001 4567 89AB D0002 3CH CHG? 0001=4567 89AB D0002 3CH CHG? 0001=2345 89AB...
  • Page 426 Programming Console Operations Section 7-2 Example 00000 00000 CHANNEL c000 MONTR 0000000000001111 c001 MONTR 0000010101010100 00000 CHANNEL 00000 00000 CHANNEL DM 0000 D0000 FFFF D0000 MONTR 1111111111111111 D0000 FFFF 00000 CHANNEL DM 0000 0000S0100R0110SR Indicates Force Reset in effect Indicates Force Set in effect...
  • Page 427 Programming Console Operations Section 7-2 7-2-12 Binary Data Modification This operation assigns a new 16-digit binary value to an IR, HR, AR, DM, EM, or LR word. The cursor, which can be shifted to the left with the up key and to the right with the down key, indicates the position of the bit that can be changed.
  • Page 428 Programming Console Operations Section 7-2 Example 00000 00000 CHANNEL 00000 CHANNEL c001 MONTR 0000010101010101 c001 CHG? =000010101010101 c001 CHG? 1=00010101010101 c001 CHG? 10=0010101010101 c001 CHG? 100=010101010101 c001 CHG? 100S=10101010101 c001 CHG? 100=010101010101 c001 CHG? 10=S010101010101 c001 CHG? 1=RS010101010101 c001 MONTR 10RS010101010101 IR bit 00115 IR bit 00100...
  • Page 429 Programming Console Operations Section 7-2 Key Sequence Example The following examples show inputting a new constant, changing from a constant to an address, and incrementing to a new constant. Inputting New SV and 00000 Changing to Word Designation 00000 00201SRCH 00201 TIM DATA #0123 00201 TIM DATA...
  • Page 430 Programming Console Operations Section 7-2 Incrementing and 00000 Decrementing 00000 00201SRCH 00201 TIM DATA #0123 00201 TIM DATA T000 #0123 #???? 00201DATA ? U/D T000 #0123 #0123 Current SV (during change operation) SV before the change 00201DATA ? T000 #0123 #0122 00201DATA ? T000 #0123 #0123 00201DATA ?
  • Page 431 Programming Console Operations Section 7-2 7-2-14 Expansion Instruction Function Code Assignments This operation is used to read or change the function codes assigned to expan- sion instructions. There are 18 function codes that can be assigned to expansion instructions: 17, 18, 19, 47, 48, 60 to 69, and 87 to 89. More than one function code can be assigned to an expansion instruction.
  • Page 432 Programming Console Operations Section 7-2 7-2-15 UM Area Allocation This operation is used to allocate part of the UM Area for use as expansion DM. It can be performed in PROGRAM mode only. Memory allocated to expansion DM is deducted from the ladder program area. The amount of memory available for the ladder program depends on the amount of RAM in the CPU Unit.
  • Page 433 This operation is used to control the ON/OFF status of bits SR 27700 through SR 27909 by pressing keys on the Programming Console’s keyboard. The C200HX/HG/HE also supports the Keyboard Mapping operation, which controls the status of bits in AR 22. These operations can be performed in any PC mode, but the Programming Console must be in TERMINAL or expansion TERMINAL mode.
  • Page 434 Turn AR 0709 OFF to return to CONSOLE mode. 7-2-18 Keyboard Mapping The C200HX/HG/HE supports the expansion keyboard mapping as well as nor- mal keyboard mapping. Expansion keyboard mapping controls the status of the 41 bits SR 27700 through SR 27909, while normal keyboard mapping controls only the 16 bits in AR 22.
  • Page 435 Programming Console Operations Section 7-2 With keyboard mapping, bits 00 to 15 of AR 22 will be turned ON when keys 0 to F are pressed on the Programming Console’s keyboard. A bit will remain ON after the Programming Console’s key is released. All bits in AR 22 will be turned OFF when AR 0708 is turned ON.
  • Page 436 Programming Console Operations Section 7-2 SR word Corresponding key(s)
  • Page 437 Programming Console Operations Section 7-2 SR word Corresponding key(s)

  • Page 439: Serial Communications

    SECTION 8 Serial Communications This section provides an overview of the serial communications (Host Link, RS-232C, one-to-one links, NT links, and proto- col macros) that operate through the RS-232C, RS-422/485, and Peripheral Ports. Introduction ............. Host Link Communications .

  • Page 440: Introduction

    Introduction Section 8-1 Introduction The RS-232C port and peripheral port built into the C200HX/HG/HE PC’s CPU Unit support the following communications functions: • Communications with Programming Devices (e.g., Programming Console or SSS.) • Host Link communications with personal computers and other external de- vices.

  • Page 441: Host Link Communications

    Host Link Communications Section 8-2 Host Link Communications 8-2-1 Host Link Command Summary Host Link communications are used to transfer data between the PC and a host computer (a personal computer or PT). It is possible to monitor the PC’s operat- ing status and the contents of PC data areas from the host computer using Host Link commands.
  • Page 442 Host Link Communications Section 8-2 The connections between the C200HX/HG/HE and a personal computer are il- lustrated below as an example. C200HX/HG/HE Personal computer Signal Signal – – – – – Shielded cable Applicable Connectors The following connectors are applicable. One plug and one hood are included with the CPU Unit.
  • Page 443 Host Link Communications Section 8-2 Custom Port Settings Standard settings or custom settings can be used for the RS-232C and peripher- al ports. The custom settings are used when the following bits are set to 1. RS-232C port: Bits 00 through 03 of DM 6645 (0: standard; 1: custom). Peripheral port: Bits 00 through 03 of DM 6650 (0: standard;...
  • Page 444 Host Link Communications Section 8-2 Note If pin 5 of the CPU Unit’s DIP switch is ON, the standard communications set- tings will be used regardless of the settings in the PC Setup. The standard set- tings are as follows: Item Setting Node number...
  • Page 445 Host Link Communications Section 8-2 Response Frame Format The response from the PC is returned in the format shown below. Prepare a pro- gram so that the response data can be interpreted and processed. x 10 x 10 x 16 x 16 ↵...
  • Page 446 Host Link Communications Section 8-2 Communications Sequence The right to send a frame is called the “transmission right.” The Unit that has the transmission right is the one that can send a frame at any given time. The trans- mission right is traded back and forth between the host computer and the PC each time a frame is transmitted.
  • Page 447 This program allows the computer to read and display the data re- ceived from the PC while a host link read command is being executed to read data from the PC. 10 ’C200HX/HG/HE SAMPLE PROGRAM FOR EXCEPTION 20 CLOSE 30 CLS 40 OPEN ”COM:E73”...

  • Page 448: Rs-232C Communications

    RS-232C Communications Section 8-3 The default values are assumed for all of the PC Setup (i.e., the RS-232C port is used in Host Link mode, the node number is 00, and the standard communica- tions parameters are used.) 00100 SR 26405 @TXD If SR 26405 (the Transmit Ready Flag) is ON DM 0000...
  • Page 449 RS-232C Communications Section 8-3 Specify whether or not a start code is to be set at the beginning of the data, and whether or not an end code is to be set at the end. Instead of setting the end code, it is possible to specify the number of bytes to be received before the re- ception operation is completed.
  • Page 450 RS-232C Communications Section 8-3 2. Use the TXD(––) instruction to transmit the data. (Bits 08 to 11 are valid only when bits 12 to 15 are set to 0.) (@)TXD S: Address of first word of data to be transmitted C: Control data Bits 00 to 03 0: Leftmost bytes first...
  • Page 451 RS-232C Communications Section 8-3 3. When RXD(––) is executed, the received data is transferred to the specified words (without the start and end codes) and the Reception Completed Flag is turned OFF. The start and end of reception are as follows: Start: Continuous reception status if the start code is not enabled.

  • Page 452: One-To-One Pc Links

    The following connectors are applicable. One plug and one hood are included with the CPU Unit. The same connectors can be used for both ends of the cable. Plug: XM2A-0901 (OMRON) or equivalent Hood: XM2S-0911 (OMRON) or equivalent C200HX/HG/HE C200HX/HG/HE, C200HS, or CQM1 Signal Signal Abb.
  • Page 453 One-to-one PC Links Section 8-4 PC Setup To use a 1:1 link, the only settings necessary are the communications mode and the link words. Set the communications mode for one of the PCs to one-to-one link master and the other PC to one-to-one link slave, and then set the link words in the PC desig- nated as the master.

  • Page 454: Nt Links

    RS-232C port Communications Communications port A port B C200HE C200HX/HG PC Setup Make the following settings when establishing an NT link. Link Port Setting One-to-one Built-in RS-232C port Set bits 12 to 15 of DM 6645 to 4.

  • Page 455: The Protocol Macro Function

    Boards and the Protocol Support Software Operation Manual for de- tails on the Protocol Support Software. Half Duplex Communications With half duplex communications, data is received and sent consecutively, i.e., not at the same time. (The C200HX/C200HG/C200HE Protocol Macro function supports half duplex communications only.) Send Send...
  • Page 456 RS-422/485 communications Temperature Controller with RS-422/485 communications RS-422/485 Temperature Controller with RS-422/485 communications 500 m max. 500 m max. Connection Cable Wiring The following diagrams show the cable wiring used with Protocol Macro function communications. RS-422/485 Adapter Connection (NT-AL001) C200HX/HG/HE AL001...
  • Page 457 Modem Connection (Straight Connection) C200HX/HG/HE Modem Note Ground the FG terminals on the PC and at the other device to 100 Ω or less. Refer to the C200HX/HG/HE Installation Manual and the documentation in- cluded with the other device for details.
  • Page 458 The Protocol Macro Function Section 8-6 8-6-2 Communications Board Settings The following parameters must be set in advance in order to use the Protocol Macro function through a Communications Board. Communications Mode Set the communications mode to Protocol Macro mode. Port B: Set bits 12 through 15 of DM 6550 to 6.
  • Page 459 The Protocol Macro Function Section 8-6 Parameter Setting Baud rate Baud rate 1,200 bps 2,400 bps 4,800 bps 9,600 bps 19,200 bps 8-6-3 Communications Procedure The Protocol Macro’s communications sequences must be created with the Pro- tocol Support Software and transferred to the Communications Board in ad- vance.
  • Page 460 The Protocol Macro Function Section 8-6 Transmission/Reception The transmission message and reception message have the following struc- Message Structure ture. Header Address Length Data Error check Terminator Item Function Header Set the data that indicates the beginning of the message. Address Set the node number or other identifier that indicates the destination for the message.
  • Page 461 The Protocol Macro Function Section 8-6 Read Word (R) Word data can be read by setting the desired attributes for the “address” or “data” in the transmission and reception messages. When the attribute is set, the address or data is read from the specified word. There are three ways to specify the word: 1, 2, 3...
  • Page 462 The Protocol Macro Function Section 8-6 Example: R(2N+6) Specifies the sixth word following the PMCR(––) instruction’s second operand for the “address” or “data” and adds two words to the specification each time that the step is repeated. Specifying the first address with 2N+6 (a first order equation using N).
  • Page 463 The Protocol Macro Function Section 8-6 Set the wild card () in the reception message so that all data will be received. In the next process, set “End” in both the transmission step and the reception step. In error processing, set “Abort” in both the transmission step and the reception step.

  • Page 465: Section 9 Troubleshooting

    SECTION 9 Troubleshooting The C200HX/HG/HE provides self-diagnostic functions to identify many types of abnormal system conditions. These func- tions minimize downtime and enable quick, smooth error correction. This section provides information on hardware and software errors that occur during PC operation. Program input errors are described in 4-7 Inputting, Modifying, and Checking the Program.

  • Page 466: Alarm Indicators

    Reading and Clearing Errors and Messages Section 9-3 Alarm Indicators The ALM/ERR indicator on the front of the CPU Unit provides visual indication of an abnormality in the PC. When the indicator is ON (ERROR), a fatal error (i.e., ones that will stop PC operation) has occurred; when the indicator is flashing (ALARM), a nonfatal error has occurred.

  • Page 467: Error Messages

    Error Messages Section 9-4 Error Messages There are basically three types of errors for which messages are displayed: ini- tialization errors, non-fatal operating errors, and fatal operating errors. Most of these are also indicated by FAL number being transferred to the FAL area of the SR area.
  • Page 468 Error Messages Section 9-4 Error and message FAL no. Probable cause Possible correction An interrupt subroutine Check the contents of Interrupt subroutine error longer than 10 ms was SR 262 and SR 263 and executed during I/O verify that the interrupt SYS FAIL FAL8B refreshing of a Remote I/O subroutine’s processing...
  • Page 469 Error Messages Section 9-4 Error and message FAL no. Probable cause Possible correction Error has occurred in PC Determine the unit number Special I/O Unit error Link Unit, Remote I/O of the Unit which caused the SIOU ERR Master Unit, between a error (AR 00 or SR 282), Host Link, SYSMAC LINK, correct the error, and toggle...
  • Page 470 If errors occur in communications, the indicator the peripheral port and RS-232C port (COMM) will not light. Check the connection, programming on both ends (C200HX/HG/HE and peripheral), and then reset the port using the reset bit (RS-232C port: SR 25209).

  • Page 471: Error Flags

    Error Flags Section 9-5 Error Flags The following table lists the flags and other information provided in the SR and AR areas that can be used in troubleshooting. Details are provided in 3-4 SR Area and 3-5 AR Area. SR Area Address(es) Function 23600 to 23615...

  • Page 472: Host Link Errors

    Host Link Errors Section 9-6 Address(es) Function 28000 to 28015 Group-2 High-density I/O Unit Error Flags for Units 0 to F 28200 to 28215 Special I/O Unit Error Flags for Units 0 to F 28300 to 28303 Communications Board Port A Error Code 28308 to 28311 Communications Board Port B Error Code AR Area...
  • Page 473 Execute QQ to register items to composite command (QQ). read before attempting batch read. User memory write-protected Pin 1 on C200HX/HG/HE DIP Turn OFF pin 1 of the CPU Unit’s switch is ON. DIP switch. Aborted due to FCS error in trans- An FCS error occurred in the se- Check the FCS calculation method.

  • Page 475: Section 10 Host Link Commands

    Host Link Commands This section describes the host link commands which can be used for host link communications via the C200HX/HG/HE ports. Refer to 8-2 Host Link Communications for information on the procedures for using host link commands and errors associated with host link commands.

  • Page 476: Host Link Command Summary

    Host Link Command Summary Section 10-1 10-1 Host Link Command Summary Command Chart The commands listed in the chart below can be used for host link communica- tions with the C200HX/HG/HE. PC mode Header code Name Page Valid Valid Valid...

  • Page 477: Host Link End Codes

    I/O words, or node number the number of I/O words. duplication for Remote Optical I/O Units. User memory protected Pin 1 on C200HX/HG/HE DIP Turn OFF pin 1 of the CPU Unit’s switch is ON. DIP switch. Aborted due to FCS error in trans- An FCS error occurred in the se- Check the FCS calculation method.
  • Page 478 Host Link End Codes Section 10-2 Errors without Responses A response won’t be received with some errors, regardless of the command. These errors are listed in the following table. Error PC operation Parity overrun or framing error during The Communications Error Flag will be turned ON, an error code will command reception be registered, and receptions will be reset.
  • Page 479 Host Link End Codes Section 10-2 10-2-2 Command/End Code Table The following table shows which end codes can be returned for each command. Header Possible End Codes Comments No response No response No end code No end code...

  • Page 480: Host Link Commands

    Host Link Commands Section 10-3 10-3 Host Link Commands This section explains the various Host Link commands that can be issued from the host computer to the PC. Refer to 8-2 Host Link Communications for in- formation on the procedures for using host link commands and errors associated with host link commands.
  • Page 481 Host Link Commands Section 10-3 10-3-2 LR AREA READ –– RL Reads the contents of the specified number of LR words, starting from the speci- fied word. Command Format ↵ x 10 x 10 x 10 x 10 x 10 x 10 x 10 x 10...
  • Page 482 Host Link Commands Section 10-3 10-3-3 HR AREA READ –– RH Reads the contents of the specified number of HR words, starting from the speci- fied word. Command Format ↵ x 10 x 10 x 10 x 10 x 10 x 10 x 10 x 10...
  • Page 483 Host Link Commands Section 10-3 10-3-4 PV READ –– RC Reads the contents of the specified number of timer/counter PVs (present val- ues), starting from the specified timer/counter. Command Format ↵ x 10 x 10 x 10 x 10 x 10 x 10 x 10 x 10...
  • Page 484 Host Link Commands Section 10-3 10-3-5 TC STATUS READ –– RG Reads the status of the Completion Flags of the specified number of timers/ counters, starting from the specified timer/counter. A “1” indicates that the Completion Flag is ON. Command Format ↵...
  • Page 485 Host Link Commands Section 10-3 10-3-6 DM AREA READ –– RD Reads the contents of the specified number of DM words, starting from the spe- cified word. Command Format ↵ x 10 x 10 x 10 x 10 x 10 x 10 x 10 x 10...
  • Page 486 Host Link Commands Section 10-3 10-3-7 AR AREA READ –– RJ Reads the contents of the specified number of AR words, starting from the speci- fied word. Command Format ↵ x 10 x 10 x 10 x 10 x 10 x 10 x 10 x 10...
  • Page 487 Host Link Commands Section 10-3 Response Format x 10 x 10 x 16 x 16 x 16 x 16 x 16 x 16 ↵ Node no. Header End code Read data (1 word) Terminator code Read data (for number of words read) Limitations The text portion of the response’s first frame can contain up to 30 words.
  • Page 488 Host Link Commands Section 10-3 Response Format x 10 x 10 x 16 x 16 ↵ Node no. Header End code Terminator code Limitations Data cannot be written to words 253 to 255. If there is an attempt to write to these words, no error will result, but nothing will be written to these words.
  • Page 489 Host Link Commands Section 10-3 Response Format x 10 x 10 x 16 x 16 ↵ Node no. Header End code Terminator code Limitations Except for the first word of the write data, the write data can be divided into multi- ple frames.
  • Page 490 Host Link Commands Section 10-3 Limitations Except for the first word of the write data, the write data can be divided into multi- ple frames. PC Settings PC Mode UM Area MONITOR PROGRAM Write-protected Read-protected Execution Conditions Commands Responses Single Multiple Single Multiple...
  • Page 491 Host Link Commands Section 10-3 Execution Conditions Commands Responses Single Multiple Single Multiple End Codes An end code of 14 (format error) will be returned if the length of the command is incorrect or the first word of write data isn’t in the first frame. An end code of 15 (entry number data error) will be returned if the specified write data exceeds the data area boundary, the beginning word isn’t specified in BCD, or the write data isn’t hexadecimal.
  • Page 492 Host Link Commands Section 10-3 End Codes An end code of 14 (format error) will be returned if the length of the command is incorrect or the first word of write data isn’t in the first frame. An end code of 15 (entry number data error) will be returned if the digits of write data aren’t 0 or 1, the specified write data exceeds the data area boundary, the beginning word isn’t specified in BCD, or the write data isn’t hexadecimal.
  • Page 493 Host Link Commands Section 10-3 End Codes An end code of 14 (format error) will be returned if the length of the command is incorrect or the first word of write data isn’t in the first frame. An end code of 15 (entry number data error) will be returned if the specified write data exceeds the data area boundary, the beginning word isn’t specified in BCD, or the write data isn’t hexadecimal.
  • Page 494 Host Link Commands Section 10-3 An end code of 15 (entry number data error) will be returned if the specified write data exceeds the data area boundary, the beginning word isn’t specified in BCD, or the write data isn’t hexadecimal. (An end code of A5 will be returned instead of 15 for non-hexadecimal write data in multiple command frames.) End code Contents...
  • Page 495 Host Link Commands Section 10-3 An end code of 15 (entry number data error) will be returned if the specified write data exceeds the data area boundary, the beginning word isn’t specified in BCD, or the write data isn’t hexadecimal. (An end code of A5 will be returned instead of 15 for non-hexadecimal write data in multiple command frames.) End code Contents...
  • Page 496 Host Link Commands Section 10-3 Execution Conditions Commands Responses Single Multiple Single Multiple End Codes An end code of 14 (format error) will be returned if the length of the command is incorrect. An end code of 15 (entry number data error) will be returned if an incorrect instruction mnemonic or TC number is used.
  • Page 497 Host Link Commands Section 10-3 The “Operand” parameter indicates the data area where the SV is stored or a constant. The “SV” parameter indicates the word address or the SV itself if it is a constant. Operand Classification Constant or word address d dd (Space)
  • Page 498 Host Link Commands Section 10-3 10-3-19 SV READ 3 –– R% Reads the constant SV or the word address where the SV is stored. The SV that is read is a 4-digit decimal number (BCD) written in the second word of the TIM, TIMH(15), CNT, CNTR(12), or TTIM(87) instruction at the specified program ad- dress in the user’s program.
  • Page 499 Host Link Commands Section 10-3 PC Settings PC Mode UM Area MONITOR PROGRAM Write-protected Read-protected Execution Conditions Commands Responses Single Multiple Single Multiple End Codes An end code of 04 (address over) will be returned if the program address is above the highest program address but less than 65,536 (32,768 in the C200HS).
  • Page 500 Host Link Commands Section 10-3 Response Format ↵ x 10 x 10 x 16 x 16 Node no. Header End code Terminator code Limitations The command can’t be executed unless the SV is BCD from 0000 to 9999. The command can’t be executed if the UM area is write-protected. If the same instruction is used more than once in a program, the SV of the first one will be changed.
  • Page 501 Host Link Commands Section 10-3 Use all four characters to specify the timer or counter instruction’s mnemonic. Add a space to the end of a TIM or CNT mnemonic to make it 4 characters long. Mnemonic Instruction name TC number range (Space) 0000 to 0511 TIMER...
  • Page 502 Host Link Commands Section 10-3 End code Contents Address over FCS error Format error Entry number data error Command not supported Frame length error User memory protected 10-3-22 SV CHANGE 3 –– W% Changes the contents of the second word of the TIM, TIMH(15), CNT, CNTR(12), or TTIM(87) at the specified program address in the user’s program.
  • Page 503 Host Link Commands Section 10-3 Response Format ↵ x 10 x 10 x 16 x 16 Node no. Header End code Terminator code Limitations The command is valid only when the UM setting is ladder only. SR 253 through SR 255 can’t be specified. The command can’t be executed if the UM area is write-protected.
  • Page 504 Host Link Commands Section 10-3 “Status data” consists of four digits (two bytes) hexadecimal. The leftmost byte indicates CPU Unit operation mode, and the rightmost byte indicates the size of the program area. x 16 x 16 15 14 13 12 Operation mode 1: Waiting for Remote I/O power application...
  • Page 505 Host Link Commands Section 10-3 10-3-24 STATUS WRITE –– SC Changes the PC operating mode. Command Format ↵ x 10 x 10 x 16 x 16 Node no. Header Mode data Terminator code Response Format ↵ x 10 x 10 x 16 x 16 Node no.
  • Page 506 Host Link Commands Section 10-3 10-3-25 ERROR READ –– MF Reads and clears errors in the PC. Also checks whether previous errors have been cleared. Command Format ↵ x 10 x 10 x 10 x 10 Node no. Header Error clear Terminator code For the “error clear”...
  • Page 507 Host Link Commands Section 10-3 Limitations When errors are being cleared (error clear = 01), the errors are read after the error clear function is executed. PC Settings PC Mode UM Area MONITOR PROGRAM Write-protected Read-protected Execution Conditions Commands Responses Single Multiple Single...
  • Page 508 Host Link Commands Section 10-3 Response Format ↵ x 10 x 10 x 16 x 16 Node no. Header End code Terminator code Limitations Bits in SR 253 through SR 255 can’t be specified. PC Settings PC Mode UM Area MONITOR PROGRAM Write-protected...
  • Page 509 Host Link Commands Section 10-3 For the TC area, “Operand” parameter indicates the mnemonic of the timer or counter instruction and the “Word address” parameter indicates the TC number. Data area/ Operand Word instruction address IR or SR (Space) 0000 to 0511 00 to 15 (Space) (Space) 0000 to 0063 (Space) (Space) 0000 to 0099...
  • Page 510 Host Link Commands Section 10-3 10-3-28 MULTIPLE FORCED SET/RESET –– FK Force sets, force resets, or cancels the forced status of the bits in one word in the IR, SR, LR, HR, or AR, or a timer/counter Completion Flag. Command Format x 10 x 10 OP1 OP2 OP3 OP4...
  • Page 511 Host Link Commands Section 10-3 Limitations Bits in SR 253 through SR 255 can’t be specified. Only 15 timers/counters or 15 Transition Flags can be set/reset. The UM settings are not checked when Transition Flags are specified, i.e., as long as the Transition Flag address does not exceed 1023, the command will be executed normally even if the specified Flag does not actually exist in the remote PC Settings PC Mode...
  • Page 512 Terminator code code “Model code” indicates the PC model in two digits hexadecimal. Model code Model C250 C500 C120 C2000 C1000H C2000H/CQM1 C20H/C28H/C40H, C200H, C200HS, C200HX/HG/HE CV500 CV1000 CV2000 CVM1-CPU01-E CVM1-CPU11-E CVM1-CPU21-E PC Settings PC Mode UM Area MONITOR PROGRAM...
  • Page 513 Host Link Commands Section 10-3 Execution Conditions Commands Responses Single Multiple Single Multiple End Codes An end code of 14 (format error) will be returned if the length of the command is incorrect. End code Contents Normal completion FCS error Format error Frame length error 10-3-31 TEST––...
  • Page 514 Host Link Commands Section 10-3 10-3-32 PROGRAM READ –– RP Reads the contents of the PC user’s program area in machine language (object code). The contents are read as a block, from the beginning to the end. Command Format ↵ x 10 x 10 Node no.
  • Page 515 Host Link Commands Section 10-3 10-3-33 PROGRAM WRITE –– WP Writes to the PC user’s program area the machine language (object code) pro- gram transmitted from the host computer. The contents are written as a block, from the beginning. Command Format ↵...
  • Page 516 Host Link Commands Section 10-3 End code Contents Format error Entry number data error Frame length error Not executable User memory protected Aborted due to FCS error in transmit data Aborted due to format error in transmit data Aborted due to entry number data error in transmit data Aborted due to frame length error in transmit data 10-3-34 I/O TABLE GENERATE ––...
  • Page 517 Host Link Commands Section 10-3 10-3-35 COMPOUND COMMAND –– QQMR Registers at the PC all of the bits, words, and timers/counters that are to be read, and reads the status of all of them as a batch. The registered information is re- tained in the PC until it is overwritten by the COMPOUND COMMAND or the PC’s power is turned off.
  • Page 518 Host Link Commands Section 10-3 Limitations The registered data is checked from the beginning and the data will be regis- tered up to any errors. For example, if a command attempts to register 129 items, a frame length error (end code 18) will occur but the first 128 items will be registered.
  • Page 519 Host Link Commands Section 10-3 Response Format x 10 x 10 x 16 x 16 x 10 x 10 x 10 x 10 Node no. Header Sub-header End code Timer/Counter Data break code code If PV is specified the sta- tus of the Completion Flag is also returned.
  • Page 520 Host Link Commands Section 10-3 Limitations Multiple responses to a command can be cancelled with this command. This command is valid even without the FCS code and terminator. PC Settings PC Mode UM Area MONITOR PROGRAM Write-protected Read-protected Execution Conditions Commands Responses Single...
  • Page 521 Host Link Commands Section 10-3 Execution Conditions Commands Responses Single Multiple Single Multiple End Codes There are no end codes with this command. 10-3-40 Undefined Command –– IC This response is returned if the header code of a command cannot be decoded. Check the header code.

  • Page 523: Standard Models

    C200HE-CPU42-E 15.2K words 12K words C200HG-CPU33-E C200HG-CPU43-E 1,184 C200HG-CPU53-E C200HG-CPU63-E 31.2K words 24K words C200HX-CPU34-E C200HX-CPU44-E 1,184 C200HX-CPU54-E C200HX-CPU64-E Power Supply Units 100 to 120/200 to 240 VAC C200HW-PA204 100 to 120/200 to 240 VAC (with 24-VDC output terminals) C200HW-PA204S...
  • Page 524 Appendix A Standard Models Expansion I/O Racks Name Specifications Model number Power Supply Units 100 to 120/200 to 240 VAC C200HW-PA204 100 to 120/200 to 240 VAC (with 24-VDC output terminals) C200HW-PA204S 24 VDC C200HW-PD024 Expansion I/O Backplanes 3 slots C200HW-BI031 5 slots C200HW-BI051...
  • Page 525 Appendix A Standard Models I/O Units Name Specifications Model number Input Units AC Input Units 8 pts 100 to 120 VAC C200H-IA121 16 pts 100 to 120 VAC C200H-IA122/IA122V 8 pts 200 to 240 VAC C200H-IA221 16 pts 200 to 240 VAC C200H-IA222/IA222V DC Input Units 8 pts...
  • Page 526 Appendix A Standard Models Name Specifications Model number B7A Interface Units 15 or 16 Connects to B7A Link Terminals. Standard C200H-B7AI1 input pts transmission delay. Connects to B7A Link Terminals. Standard C200H-B7AO1 (see output transmission delay. note) Note: If the Interrupt Input Unit is mounted on an Expansion I/O Rack, the interrupt function cannot be used and the Interrupt Input Unit will be treated as an ordinary 8-point Input Unit.
  • Page 527 Appendix A Standard Models Name Specifications Model number Analog I/O Analog Input Units 4 to 20 mA, 1 to 5/0 to 10 V (switchable); 4 inputs; 12 bits C200H-AD001 Units Units 4 to 20 mA, 1 to 5/0 to 10 V/–10 to 10V (switchable); 8 C200H-AD002 inputs;...
  • Page 528 Appendix A Standard Models Name Specifications Model number Position Control Units 1 axis Pulse output; speeds: 1 to 100,000 pps C200H-NC111 1 axis Pulse output; directly connects to C200H-NC112 servomotor driver; compatible with line driver; speeds: 1 to 250,000 pps 1 axis Pulse output;...
  • Page 529 Link Unit to C200HW COM01/COM04 E Communications Board For 2 Units C200HW-CE002 Host Link Units Rack-mounting C200H, C200HS, APF/PCF C200H-LK101-PV1 C200HE, C200HE, C200HG, C200HX RS-422 C200H-LK202-V1 RS-232C C200H-LK201-V1 PC Link Unit Single level: 32 Units RS-485 C200H-LK401 Multilevel: 16 Units Remote I/O Master Up to two per PC;...
  • Page 530 Appendix A Standard Models Link Adapters Name Specifications Model number Link Adapters 3 RS-422 connectors 3G2A9-AL001 3 optical connectors (APF/PCF) 3G2A9-AL002-PE 3 optical connectors (PCF) 3G2A9-AL002-E 1 connector for RS-232C; 2 for RS-422 3G2A9-AL003 1 connector each for APF/PCF, RS-422, and RS-232C 3G2A9-AL004-PE 1 connector each for PCF, RS-422, and RS-232C 3G2A9-AL004-E...
  • Page 531 The boxes (jjj) are replaced by codes indicating the standard model lengths, as shown below. Consult with your OMRON representative for longer cables. When ordering longer cables, omit the portion represented by the boxes and specify the length in meters separately, e.g., S3200-CN-20-20, 30 m.
  • Page 532 Appendix A Standard Models Plastic Clad Optical Fiber Cable for SYSMAC BUS Name Specifications Model number Standards Plastic Clad Optical Fiber 0.1 m, w/connectors Ambient temp: 3G5A2-OF011 Cables (indoor) Cables (indoor) –10° to 70°C 10° to 70°C 1 m, w/connectors 3G5A2-OF101 2 m, w/connectors 3G5A2-OF201...
  • Page 533 Appendix A Standard Models Name Specifications Model number Stan- dards Optical Fiber Cable Connector SYSMAC NET: Full-lock con- S3200-COCH62M S3200-LSU03-01E nector for NSU, B700-AL001 NSB, and C500 C500-SNT31-V4 SYSMAC NET Link Unit SYSMAC BUS: Half-lock con- S3200-COCH82 C200H-RM001-PV1 nector for Re- C200H-RT001/RT002-P mote I/O Mas- C500-RM001-(P)V1...
  • Page 534 Appendix A Standard Models Optical Power Tester Name Specifications Head Unit Model number Stan- dards Optical Power Tester (see note) SYSMAC NET: S3200-CAT200 S3200-CAT2000 (provided with a connector CV500-SNT31 2 (provided with adapter, light source unit, small C200HS-SNT32 the Tester) single head plug hard case single-head plug, hard case, SYSMAC LINK:...
  • Page 535 Data Setting Console Connecting Cables Connecting Cables C200H-CN425 Connecting Cable Used to connect an IBM PC/AT or 3.3 m CQM1-CIF02 compatible to the C200HX/HG/HE. Optional Products Name Specifications Model number Standards I/O Unit Cover Cover for 10-pin terminal block C200H-COV11...
  • Page 536 SYSMAC Support Soft- 3.5”, 2HD for IBM PC/AT compatible C500-ZL3AT1-E ware (for C20, CjjP, Note: Version 1.0 doesn’t support the additional CjjK, C120, CjjH, functions of the C200HX/HG/HE. C200H, C200HS, C200HE, C200HG, C200HX, C500, C1000H, C2000H, CQM1, and CVM1)
  • Page 537 Appendix A Standard Models Protocol Support Software Name Specifications Model number Stan- dards Protocol Support Software 3.5”, 2HD for IBM PC/AT compatible C200HW-ZW3AT1-E Training Materials Name Specifications Model number Stan- dards SYSMAC Training System Includes text book, cassette tape, and input C200H-ETL01-E switch board.

  • Page 539: Programming Instructions

    Appendix B Programming Instructions A PC instruction is input either by pressing the corresponding Programming Console key(s) (e.g., LD, AND, OR, NOT) or by using function codes. To input an instruction with its function code, press FUN, the function code, and then WRITE.
  • Page 540 Programming Instructions Appendix B Code Mnemonic Name Function Page DIFU DIFFERENTIATE UP Turns ON the designated bit for one cycle on the rising edge of the input signal. DIFD DIFFERENTIATE Turns ON the bit for one cycle on the trailing edge. DOWN TIMH HIGH-SPEED TIMER...
  • Page 541 Programming Instructions Appendix B Code Mnemonic Name Function Page (@)52 BINARY MULTIPLY Multiplies two four-digit hexadecimal values and outputs result to specified result words. (@)53 BINARY DIVIDE Divides four-digit hexadecimal dividend by four-digit hexa- decimal divisor and outputs result to specified result words. (@)54 ADDL DOUBLE BCD ADD...
  • Page 542 Programming Instructions Appendix B Code Mnemonic Name Function Page (@)86 ASCII CONVERT Converts hexadecimal values from the source word to eight-bit ASCII code starting at leftmost or rightmost half of starting destination word. 87 to 89 For expansion instructions. (@)90 SEND NETWORK SEND Used for communications with other PCs linked through...
  • Page 543 Programming Instructions Appendix B Code Mnemonic Name Function Page 7SEG 7-SEGMENT DISPLAY Converts 4- or 8-digit BCD data to 7-segment display OUTPUT format and then outputs the converted data. (@)ADBL DOUBLE BINARY ADD Adds two 8-digit binary values (normal or signed data) and outputs the result to R and R+1.
  • Page 544 Programming Instructions Appendix B Code Mnemonic Name Function Page (@)RXD RECEIVE Receives data via a communications port. (@)SBBL DOUBLE BINARY Subtracts an 8-digit binary value (normal or signed data) SUBTRACT from another and outputs the result to R and R+1. (@)SCL SCALING Performs a scaling conversion on the calculated value.
  • Page 545 Appendix C Error and Arithmetic Flag Operation The following table shows the instructions that affect the N, OF, UF, ER, CY, GR, LE and EQ flags. In general, N indicates a negative result, OF indicates that the result of a 16-bit calculation is greater than 32,767 (7FFF) or the result of a 32-bit calculation is greater than 2,147,483,647 (7FFF FFFF).
  • Page 546 Error and Arithmetic Flag Operation Appendix C Mnemonic 25503 25504 25505 25506 25507 25404 25405 25402 Page (ER) (CY) (GR) (EQ) (LE) (OF) (UF) CLC(41) µ MSG(46) µ µ µ µ µ µ ADB(50) µ µ µ µ µ µ SBB(51) µ...
  • Page 547 Error and Arithmetic Flag Operation Appendix C Mnemonic 25503 25504 25505 25506 25507 25404 25405 25402 Page (ER) (CY) (GR) (EQ) (LE) (OF) (UF) µ BXF2(––) µ CMCR(––) µ µ µ µ CMPL(60) µ µ COLM(64) µ µ µ µ CPS(––) µ...
  • Page 548 Error and Arithmetic Flag Operation Appendix C Mnemonic 25503 25504 25505 25506 25507 25404 25405 25402 Page (ER) (CY) (GR) (EQ) (LE) (OF) (UF) µ µ µ µ ZCPL(––)

  • Page 549: Word Assignment Recording Sheets

    Appendix D Word Assignment Recording Sheets This appendix contains sheets that can be copied by the programmer to record I/O bit allocations and terminal assignments, as well as details of work bits, data storage areas, timers, and counters.
  • Page 550 I/O Bits Programmer: Program: Date: Page: Word: Unit: Word: Unit: Field device Notes Field device Notes Word: Unit: Word: Unit: Field device Notes Field device Notes...
  • Page 551 Work Bits Programmer: Program: Date: Page: Area: Word: Area: Word: Usage Notes Usage Notes Area: Word: Area: Word: Usage Notes Usage Notes...
  • Page 552 Data Storage Programmer: Program: Date: Page: Word Contents Notes Word Contents Notes...
  • Page 553 Timers and Counters Programmer: Program: Date: Page: T or C T or C TC address Set value Notes TC address Set value Notes...

  • Page 555: Program Coding Sheet

    Appendix E Program Coding Sheet The following page can be copied for use in coding ladder diagram programs. It is designed for flexibility, allowing the user to input all required addresses and instructions. When coding programs, be sure to specify all function codes for instructions and data areas (or # for constant) for operands.
  • Page 556 Program Coding Sheet Programmer: Program: Date: Page: Address Instruction Operand(s) Address Instruction Operand(s) Address Instruction Operand(s)

  • Page 557: Data Conversion Tables

    Appendix F Data Conversion Tables Normal Data Decimal Binary 00000000 00000000 00000001 00000001 00000010 00000010 00000011 00000011 00000100 00000100 00000101 00000101 00000110 00000110 00000111 00000111 00001000 00001000 00001001 00001001 00010000 00001010 00010001 00001011 00010010 00001100 00010011 00001101 00010100 00001110 00010101 00001111 00010110 00010000...
  • Page 558 Appendix F Data Conversion Tables Signed Binary Data Decimal 16-bit Hex 32-bit Hex 2147483647 7FFFFFFF 2147483646 7FFFFFFE 32768 00008000 32767 7FFF 00007FFF 32766 7FFE 00007FFE 0005 00000005 0004 00000004 0003 00000003 0002 00000002 0001 00000001 0000 00000000 –1 FFFF FFFFFFFF –2 FFFE FFFFFFFE...

  • Page 559: Extended Ascii

    Appendix G Extended ASCII Programming Console Displays Bits 0 to 3 Bits 4 to 7 0000 0001 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111 0000 Space 0001 " " 0010 0011 0100 0101 & & 0110 0111 1000...

  • Page 561: Glossary

    Glossary address The location in memory where data is stored. For data areas, an address con- sists of a two-letter data area designation and a number that designates the word and/or bit location. For the UM area, an address designates the instruction location (UM area).
  • Page 562 This allocation is the same in each LR Area of each PC. Communications Board A board that is mounted to the optional slot of a C200HX/HG/HE CPU Unit. With a Communications Board, the CPU Unit can communicate with the SYSMAC...
  • Page 563 Glossary counter A dedicated group of digits or words in memory used to count the number of times a specific process has occurred, or a location in memory accessed through a TC bit and used to count the number of times the status of a bit or an execution condition has changed from OFF to ON.
  • Page 564 Glossary differentiated instruction An instruction that is executed only once each time its execution condition goes from OFF to ON. Non-differentiated instructions are executed each cycle as long as the execution condition stays ON. differentiation instruction An instruction used to ensure that the operand bit is never turned ON for more than one cycle after the execution condition goes either from OFF to ON for a Differentiate Up instruction or from ON to OFF for a Differentiate Down instruc- tion.
  • Page 565 Glossary extended counter A counter created in a program by using two or more count instructions in suc- cession. Such a counter is capable of counting higher than any of the standard counters provided by the individual instructions. extended timer A timer created in a program by using two or more timers in succession.
  • Page 566 Glossary increment Increasing a numeric value. indirect address An address whose contents indicates another address. The contents of the se- cond address will be used as the operand. Indirect addressing is possible in the DM area only. initialization error An error that occurs either in hardware or software during the PC System start- up, i.e., during initialization.
  • Page 567 Glossary inverse condition A condition that produces an ON execution condition when the bit assigned to it is OFF, and an OFF execution condition when the bit assigned to it is ON. I/O capacity The number of inputs and outputs that a PC is able to handle. This number ranges from around one hundred for smaller PCs to two thousand for the largest ones.
  • Page 568 Glossary ladder diagram (program) A form of program arising out of relay-based control systems that uses circuit- type diagrams to represent the logic flow of programming instructions. The ap- pearance of the program is similar to a ladder, and thus the name. ladder diagram symbol A symbol used in a ladder-diagram program.
  • Page 569 The device at a node is identified by the node number. One loop of a Net Link System (OMRON’s LAN) can consist of up to 126 nodes. Each node is occupied by a Net Link Unit mounted to a PC or a device providing an interface to a computer or other peripheral device.
  • Page 570 Glossary normal condition A condition that produces an ON execution condition when the bit assigned to it is ON, and an OFF execution condition when the bit assigned to it is OFF. A logic operation which inverts the status of the operand. For example, AND NOT indicates an AND operation with the opposite of the actual status of the op- erand bit.
  • Page 571 Glossary output device An external device that receives signals from the PC System. output point The point at which an output leaves the PC System. Output points correspond physically to terminals or connector pins. output signal A signal being sent to an external device. Generally an output signal is said to exist when, for example, a connection point goes from low to high voltage or from a nonconductive to a conductive state.
  • Page 572 Glossary Programmable Controller A computerized device that can accept inputs from external devices and gener- ate outputs to external devices according to a program held in memory. Pro- grammable Controllers are used to automate control of external devices. Al- though single-component Programmable Controllers are available, building- block Programmable Controllers are constructed from separate components.
  • Page 573 Glossary Remote I/O System A system in which remote I/O points are controlled through a Master mounted to a CPU Rack or an Expansion I/O Rack connected to the CPU Rack. Remote I/O Unit Any of the Units in a Remote I/O System. Remote I/O Units include Masters, Slaves, Optical I/O Units, I/O Link Units, and Remote Terminals.
  • Page 574 Glossary Slave Short for Remote I/O Slave Unit. Slave Rack A Rack containing a Remote I/O Slave Unit and controlled through a Remote I/O Master Unit. Slave Racks are generally located away from the CPU Rack. slot A position on a Rack (Backplane) to which a Unit can be mounted. software error An error that originates in a software program.
  • Page 575 Unit In OMRON PC terminology, the word Unit is capitalized to indicate any product sold for a PC System. Though most of the names of these products end with the word Unit, not all do, e.g., a Remote Terminal is referred to in a collective sense as a Unit.
  • Page 576 Glossary word setting made on the Unit is added to 32 times the word multiplier to arrive at the actual word to be allocated. work bit A bit in a work word. work word A word that can be used for data calculation or other manipulation in program- ming, i.e., a ‘work space’...

  • Page 577: Index

    Index definition, 25 Output OFF, 42 Control System, definition, 3 address tracing. See tracing, data tracing. controlled system, definition, 3 addresses, in data area, 26 counters advanced I/O instructions bits in TC area, 68 7-SEGMENT DISPLAY OUTPUT, 341 changing SV, 410 DIGITAL SWITCH INPUT, 344 conditions when reset, 166, 170 functions, 340...
  • Page 578 Index decrementing, 228 AR and SR area error flags, 453 arithmetic, 44 definers, definition, 138 programming example, 194, 197, 201 delay time, in C500 Remote I/O Systems, 382 CPU Unit-mounting Device Mounted, 55 differentiated instructions, 140 function codes, 138 clearing, 229 digit, monitoring, 394 setting, 229 digit numbers, 26...
  • Page 579 Index R$, 478 7SEG(––), 340 R%, 480 ADB(50), 243 RC, 465 ADBL(––), 249 RD, 467 ADD(30), 229 ADDL(54), 230 RE, 468 RG, 466 AND, 78, 149 combining with OR, 79 RH, 464 RJ, 468 AND LD, 81, 150 combining with OR LD, 84 RL, 463 RP, 496 use in logic blocks, 82...
  • Page 580 Index ILC(03), 117, 155–157 SEND(90), 322 SET, 153 INC(38), 228 INT(89), 289 SFT(10), 171 SFTR(84), 173 IORD(––), 354 SLD(74), 177 IORF(97), 310 SNXT(09), 295 IOWR(––), 355 SRCH(––), 318, 319 JME(05), 157 SRD(75), 177 JMP(04), 157 STC(40), 229 JMP(04) and JME(05), 119 STEP(08), 295 KEEP(11), 154 STUP(––), 337...
  • Page 581 Index combining, AND LD and OR LD, 84 application, 30 controlling bit status controlling, via Output OFF bit, 42 using KEEP(11), 121 controlling ON/OFF time, 151 using OUT and OUT NOT, 150 controlling status, 120, 121 format, 138 definition, 3 notation, 138 output device, definition, 3 structure, 75...
  • Page 582 Index SYSMAC LINK, loop status and completion codes, 38 SYSMAC LINK System Active Node Flags, 52 Racks, types, 15 instructions, 322 Remote I/O Master Units, PC cycle time, 369 service time, 53 Remote I/O Systems, error bits and flags, 39 Using Peripheral Devices, 54 response time calculations, C500 PCs, 384 SYSMAC NET, loop status and completion codes, 38...

  • Page 583: Revision History

    Revision History A manual revision code appears as a suffix to the catalog number on the front cover of the manual. Cat. No. W303-E1-09 Revision code The following table outlines the changes made to the manual during each revision. Page numbers refer to the previous version.
  • Page 586 W303-E1-09...

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